Matthew Poremba has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/47105 )
Change subject: arch-vega: Fix VEGA_X86 build issues
......................................................................
arch-vega: Fix VEGA_X86 build issues
The registerManager was not being dereferenced properly. Also remove
non-existant include file.
Change-Id: I5dac692abedc327ed83ee904e4c6ac5dac811e4c
---
M src/arch/amdgpu/vega/insts/gpu_static_inst.cc
M src/arch/amdgpu/vega/insts/instructions.cc
M src/arch/amdgpu/vega/operand.hh
3 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/src/arch/amdgpu/vega/insts/gpu_static_inst.cc
b/src/arch/amdgpu/vega/insts/gpu_static_inst.cc
index a78834a..b9c89d5 100644
--- a/src/arch/amdgpu/vega/insts/gpu_static_inst.cc
+++ b/src/arch/amdgpu/vega/insts/gpu_static_inst.cc
@@ -36,7 +36,6 @@
#include "arch/amdgpu/vega/gpu_decoder.hh"
#include "arch/amdgpu/vega/insts/instructions.hh"
#include "debug/GPUExec.hh"
-#include "gpu-compute/flexible_pool_manager.hh"
#include "gpu-compute/shader.hh"
namespace VegaISA
diff --git a/src/arch/amdgpu/vega/insts/instructions.cc
b/src/arch/amdgpu/vega/insts/instructions.cc
index ef3023d..4dddeed 100644
--- a/src/arch/amdgpu/vega/insts/instructions.cc
+++ b/src/arch/amdgpu/vega/insts/instructions.cc
@@ -4165,7 +4165,7 @@
DPRINTF(GPUExec, "CU%d: decrease ref ctr WG[%d] to [%d]\n",
wf->computeUnit->cu_id, wf->wgId, refCount);
- wf->computeUnit->registerManager.freeRegisters(wf);
+ wf->computeUnit->registerManager->freeRegisters(wf);
wf->computeUnit->stats.completedWfs++;
wf->computeUnit->activeWaves--;
diff --git a/src/arch/amdgpu/vega/operand.hh
b/src/arch/amdgpu/vega/operand.hh
index bb89fb3..54a6f04 100644
--- a/src/arch/amdgpu/vega/operand.hh
+++ b/src/arch/amdgpu/vega/operand.hh
@@ -151,7 +151,7 @@
ComputeUnit *cu = _gpuDynInst->computeUnit();
for (auto i = 0; i < NumDwords; ++i) {
- int vgprIdx = cu->registerManager.mapVgpr(wf, _opIdx + i);
+ int vgprIdx = cu->registerManager->mapVgpr(wf, _opIdx + i);
vrfData[i] = &cu->vrf[wf->simdId]->readWriteable(vgprIdx);
DPRINTF(GPUVRF, "Read v[%d]\n", vgprIdx);
@@ -205,7 +205,7 @@
? _gpuDynInst->exec_mask : wf->execMask();
if (NumDwords == 1) {
- int vgprIdx = cu->registerManager.mapVgpr(wf, _opIdx);
+ int vgprIdx = cu->registerManager->mapVgpr(wf, _opIdx);
vrfData[0] = &cu->vrf[wf->simdId]->readWriteable(vgprIdx);
assert(vrfData[0]);
auto reg_file_vgpr = vrfData[0]->template as<VecElemU32>();
@@ -221,8 +221,8 @@
DPRINTF(GPUVRF, "Write v[%d]\n", vgprIdx);
cu->vrf[wf->simdId]->printReg(wf, vgprIdx);
} else if (NumDwords == 2) {
- int vgprIdx0 = cu->registerManager.mapVgpr(wf, _opIdx);
- int vgprIdx1 = cu->registerManager.mapVgpr(wf, _opIdx + 1);
+ int vgprIdx0 = cu->registerManager->mapVgpr(wf, _opIdx);
+ int vgprIdx1 = cu->registerManager->mapVgpr(wf, _opIdx +
1);
vrfData[0] = &cu->vrf[wf->simdId]->readWriteable(vgprIdx0);
vrfData[1] = &cu->vrf[wf->simdId]->readWriteable(vgprIdx1);
assert(vrfData[0]);
@@ -645,16 +645,16 @@
if (_opIdx == REG_VCC_LO) {
sgprIdx = cu->registerManager
- .mapSgpr(wf, wf->reservedScalarRegs - 2 + dword);
+ ->mapSgpr(wf, wf->reservedScalarRegs - 2 + dword);
} else if (_opIdx == REG_FLAT_SCRATCH_HI) {
sgprIdx = cu->registerManager
- .mapSgpr(wf, wf->reservedScalarRegs - 3 + dword);
+ ->mapSgpr(wf, wf->reservedScalarRegs - 3 + dword);
} else if (_opIdx == REG_FLAT_SCRATCH_LO) {
assert(NumDwords == 1);
sgprIdx = cu->registerManager
- .mapSgpr(wf, wf->reservedScalarRegs - 4 + dword);
+ ->mapSgpr(wf, wf->reservedScalarRegs - 4 + dword);
} else {
- sgprIdx = cu->registerManager.mapSgpr(wf, _opIdx + dword);
+ sgprIdx = cu->registerManager->mapSgpr(wf, _opIdx + dword);
}
assert(sgprIdx > -1);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5dac692abedc327ed83ee904e4c6ac5dac811e4c
Gerrit-Change-Number: 47105
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba <[email protected]>
Gerrit-MessageType: newchange
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