Sandipan Das has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/40922 )
Change subject: arch-power: Add parity instructions
......................................................................
arch-power: Add parity instructions
This adds the following instructions.
* Parity Word (prtyw)
* Parity Doubleword (prtyd)
Change-Id: Ic102d722f1bc8cea4921ddbf9febfa0e7c0f892e
Signed-off-by: Sandipan Das <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40922
Reviewed-by: Boris Shingarov <[email protected]>
Maintainer: Boris Shingarov <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/power/isa/decoder.isa
1 file changed, 17 insertions(+), 0 deletions(-)
Approvals:
Boris Shingarov: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index fdb86f9..bf25155 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -328,11 +328,28 @@
151: stwx({{ Mem_uw = Rs_uw; }});
}
+ 154: IntLogicOp::prtyw({{
+ uint64_t res = Rs;
+ res = res ^ (res >> 16);
+ res = res ^ (res >> 8);
+ res = res & 0x100000001;
+ Ra = res;
+ }});
+
format StoreIndexUpdateOp {
181: stdux({{ Mem = Rs; }});
183: stwux({{ Mem_uw = Rs_uw; }});
}
+ 186: IntLogicOp::prtyd({{
+ uint64_t res = Rs;
+ res = res ^ (res >> 32);
+ res = res ^ (res >> 16);
+ res = res ^ (res >> 8);
+ res = res & 0x1;
+ Ra = res;
+ }});
+
192: IntCompOp::cmprb({{
uint32_t src1 = Ra_ub;
uint32_t src2 = Rb_uw;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic102d722f1bc8cea4921ddbf9febfa0e7c0f892e
Gerrit-Change-Number: 40922
Gerrit-PatchSet: 8
Gerrit-Owner: Sandipan Das <[email protected]>
Gerrit-Reviewer: Boris Shingarov <[email protected]>
Gerrit-Reviewer: Sandipan Das <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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