Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/48463 )
Change subject: arch: Implement operator& for TypeTLB
......................................................................
arch: Implement operator& for TypeTLB
Change-Id: I05af52ba5e0ef84510ca3f4c27d8f9cd55e07d90
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48463
Reviewed-by: Andreas Sandberg <[email protected]>
Maintainer: Andreas Sandberg <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/generic/BaseTLB.py
M src/arch/generic/tlb.hh
2 files changed, 24 insertions(+), 0 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/generic/BaseTLB.py b/src/arch/generic/BaseTLB.py
index 8af4585..cbc296b 100644
--- a/src/arch/generic/BaseTLB.py
+++ b/src/arch/generic/BaseTLB.py
@@ -45,6 +45,13 @@
instruction: TLB contains instruction entries only
data: TLB contains data entries only
unified: TLB contains both instruction and data entries
+
+ The enum values have been selected in order to perform bitwise
+ operations on them. For example a unified TLB contains both
+ instruction and data entries so code trying to assess if the
+ TLB is storing (e.g.) data entries can do that with:
+
+ bool has_data = tlb->type() & TypeTLB::data;
"""
map = {
'instruction' : 0x1,
diff --git a/src/arch/generic/tlb.hh b/src/arch/generic/tlb.hh
index 8f192eb..16b7eec 100644
--- a/src/arch/generic/tlb.hh
+++ b/src/arch/generic/tlb.hh
@@ -41,6 +41,8 @@
#ifndef __ARCH_GENERIC_TLB_HH__
#define __ARCH_GENERIC_TLB_HH__
+#include <type_traits>
+
#include "arch/generic/mmu.hh"
#include "base/logging.hh"
#include "enums/TypeTLB.hh"
@@ -125,6 +127,21 @@
BaseTLB* nextLevel() const { return _nextLevel; }
};
+/** Implementing the "&" bitwise operator for TypeTLB allows us to handle
+ * TypeTLB::unified efficiently. For example if I want to check if a TLB
+ * is storing instruction entries I can do this with:
+ *
+ * tlb->type() & TypeTLB::instruction
+ *
+ * which will cover both TypeTLB::instruction and TypeTLB::unified TLBs
+ */
+inline auto
+operator&(TypeTLB lhs, TypeTLB rhs)
+{
+ using T = std::underlying_type_t<TypeTLB>;
+ return static_cast<T>(lhs) & static_cast<T>(rhs);
+}
+
} // namespace gem5
#endif // __ARCH_GENERIC_TLB_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I05af52ba5e0ef84510ca3f4c27d8f9cd55e07d90
Gerrit-Change-Number: 48463
Gerrit-PatchSet: 5
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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