Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/49223 )
Change subject: arch-arm: Eliminate the INTREG_DUMMY integer register.
......................................................................
arch-arm: Eliminate the INTREG_DUMMY integer register.
This register index was for an integer register which was just something
to return when the result should be thrown away. That's basically what
the zero register is/could already be used for. Replace INTREG_DUMMY
with INTREG_ZERO.
Also, change the type used for an index in SVE memory instructions from
IntRegIndex to RegIndex, since it's not actually storing an integer
register index, and g++ gets upset when you try to compare one against a
value which is out of range for that enum.
Change-Id: Ibdc488a2b55162a5f9e3d355126f6c48a99272a9
---
M src/arch/arm/isa/insts/misc.isa
M src/arch/arm/isa/templates/sve_mem.isa
M src/arch/arm/regs/int.hh
M src/arch/arm/utility.hh
4 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/src/arch/arm/isa/insts/misc.isa
b/src/arch/arm/isa/insts/misc.isa
index bbd183d..2add447 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -290,7 +290,7 @@
// you look at the generated C code you'll find that they
are.
// However this is safe as DecodedBankedIntReg (which is
used
// in operands.isa to get the index of DecodedBankedIntReg)
- // will return INTREG_DUMMY if its not a valid integer
+ // will return INTREG_ZERO if its not a valid integer
// register, so redirecting the write to somewhere we don't
// care about.
DecodedBankedIntReg = Op1;
diff --git a/src/arch/arm/isa/templates/sve_mem.isa
b/src/arch/arm/isa/templates/sve_mem.isa
index 6a9ea7e..017ace8 100644
--- a/src/arch/arm/isa/templates/sve_mem.isa
+++ b/src/arch/arm/isa/templates/sve_mem.isa
@@ -890,7 +890,7 @@
typedef _Element Element;
typedef _Element TPElem;
- IntRegIndex dest;
+ RegIndex dest;
IntRegIndex gp;
IntRegIndex base;
int64_t imm;
@@ -904,7 +904,7 @@
public:
%(class_name)s(const char* mnem, ExtMachInst machInst,
- IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
+ RegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
int64_t _imm, uint8_t _numRegs, int _regIndex) :
%(base_class)s(mnem, machInst, %(op_class)s),
dest(_dest), gp(_gp), base(_base), imm(_imm),
@@ -1167,7 +1167,7 @@
typedef _Element Element;
typedef _Element TPElem;
- IntRegIndex dest;
+ RegIndex dest;
IntRegIndex gp;
IntRegIndex base;
IntRegIndex offset;
@@ -1181,7 +1181,7 @@
public:
%(class_name)s(const char* mnem, ExtMachInst machInst,
- IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
+ RegIndex _dest, IntRegIndex _gp, IntRegIndex _base,
IntRegIndex _offset, uint8_t _numRegs, int _regIndex) :
%(base_class)s(mnem, machInst, %(op_class)s),
dest(_dest), gp(_gp), base(_base), offset(_offset),
diff --git a/src/arch/arm/regs/int.hh b/src/arch/arm/regs/int.hh
index 30230e8..59f8a6d 100644
--- a/src/arch/arm/regs/int.hh
+++ b/src/arch/arm/regs/int.hh
@@ -127,7 +127,6 @@
INTREG_UREG0,
INTREG_UREG1,
INTREG_UREG2,
- INTREG_DUMMY, // Dummy reg used to throw away int reg results
INTREG_SP0,
INTREG_SP1,
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 9b2496e..bf6bae5 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -396,7 +396,7 @@
bool validReg;
validReg = decodeMrsMsrBankedReg(sysM, r, isIntReg, regIdx, 0, 0, 0,
false);
- return (validReg && isIntReg) ? regIdx : INTREG_DUMMY;
+ return (validReg && isIntReg) ? regIdx : INTREG_ZERO;
}
/**
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibdc488a2b55162a5f9e3d355126f6c48a99272a9
Gerrit-Change-Number: 49223
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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