Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/49739 )
Change subject: arch: Add some indirection for Operand RegId generation.
......................................................................
arch: Add some indirection for Operand RegId generation.
That introduces a place to hook in to override what actual register
index is passed to the rest of gem5.
Change-Id: I77d778849410ee5d32bab669bba411e80603a002
---
M src/arch/isa_parser/operand_types.py
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/arch/isa_parser/operand_types.py
b/src/arch/isa_parser/operand_types.py
index f5f7d82..5060a5e 100755
--- a/src/arch/isa_parser/operand_types.py
+++ b/src/arch/isa_parser/operand_types.py
@@ -100,8 +100,8 @@
derived classes encapsulates the traits of a particular operand
type (e.g., "32-bit integer register").'''
- src_reg_constructor = '\n\tsetSrcRegIdx(_numSrcRegs++, RegId(%s, %s));'
- dst_reg_constructor = '\n\tsetDestRegIdx(_numDestRegs++,
RegId(%s, %s));'
+ src_reg_constructor = '\n\tsetSrcRegIdx(_numSrcRegs++, %s);'
+ dst_reg_constructor = '\n\tsetDestRegIdx(_numDestRegs++, %s);'
def buildReadCode(self, predRead, op_idx):
subst_dict = {"name": self.base_name,
@@ -125,6 +125,9 @@
if (traceData) { traceData->setData(final_val); }
}''' % (self.ctype, self.base_name, code)
+ def regId(self):
+ return f'RegId({self.reg_class}, {self.reg_spec})'
+
def __init__(self, parser, full_name, ext, is_src, is_dest):
self.parser = parser
self.full_name = full_name
@@ -220,13 +223,13 @@
c_dest = ''
if self.is_src:
- c_src = self.src_reg_constructor % (self.reg_class,
self.reg_spec)
+ c_src = self.src_reg_constructor % self.regId()
if self.hasReadPred():
c_src = '\n\tif (%s) {%s\n\t}' % \
(self.read_predicate, c_src)
if self.is_dest:
- c_dest = self.dst_reg_constructor % (self.reg_class,
self.reg_spec)
+ c_dest = self.dst_reg_constructor % self.regId()
c_dest += f'\n\t_numTypedDestRegs[{self.reg_class}]++;'
if self.hasWritePred():
c_dest = '\n\tif (%s) {%s\n\t}' % \
@@ -489,10 +492,10 @@
c_dest = ''
if self.is_src:
- c_src = self.src_reg_constructor % (self.reg_class,
self.reg_spec)
+ c_src = self.src_reg_constructor % self.regId()
if self.is_dest:
- c_dest = self.dst_reg_constructor % (self.reg_class,
self.reg_spec)
+ c_dest = self.dst_reg_constructor % self.regId()
return c_src + c_dest
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I77d778849410ee5d32bab669bba411e80603a002
Gerrit-Change-Number: 49739
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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