[gem5-dev] Change in gem5/gem5[develop]: cpu: Generalize how register files are serialized.

[Gabe Black (Gerrit) via gem5-dev]

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50252 )

Change subject: cpu: Generalize how register files are serialized.
......................................................................

cpu: Generalize how register files are serialized.

Instead of explicitly serializing each type of register explicitly, and
using custom types, etc, store them as generic blocks of data.

Change-Id: I61dbd7825ffe35c41e1b7c8317590d06c21b4513
---
M src/cpu/thread_context.cc
1 file changed, 22 insertions(+), 67 deletions(-)



diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index 4985d11..0b6a2ae 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -210,43 +210,19 @@
 void
 serialize(const ThreadContext &tc, CheckpointOut &cp)
 {
-    // Cast away the const so we can get the non-const ISA ptr, which we  
then
-    // use to get the const register classes.
-    auto &nc_tc = const_cast<ThreadContext &>(tc);
-    const auto &regClasses = nc_tc.getIsaPtr()->regClasses();
+    for (const auto *reg_class: tc.getIsaPtr()->regClasses()) {
+        const size_t reg_bytes = reg_class->regBytes();
+        const size_t reg_count = reg_class->size();

-    const size_t numFloats = regClasses.at(FloatRegClass)->size();
-    RegVal floatRegs[numFloats];
-    for (auto &id: *regClasses.at(FloatRegClass))
-        floatRegs[id.index()] = tc.getRegFlat(id);
-    // This is a bit ugly, but needed to maintain backwards
-    // compatibility.
-    arrayParamOut(cp, "floatRegs.i", floatRegs, numFloats);
+        uint8_t regs[reg_count * reg_bytes];
+        auto *reg_ptr = regs;
+        for (const auto &id: *reg_class) {
+            tc.getRegFlat(id, reg_ptr);
+            reg_ptr += reg_bytes;
+        }

-    const size_t numVecs = regClasses.at(VecRegClass)->size();
-    std::vector<TheISA::VecRegContainer> vecRegs(numVecs);
-    for (auto &id: *regClasses.at(VecRegClass))
-        tc.getRegFlat(id, &vecRegs[id.index()]);
-    SERIALIZE_CONTAINER(vecRegs);
-
-    const size_t numPreds = regClasses.at(VecPredRegClass)->size();
-    std::vector<TheISA::VecPredRegContainer> vecPredRegs(numPreds);
-    for (auto &id: *regClasses.at(VecPredRegClass))
-        tc.getRegFlat(id, &vecPredRegs[id.index()]);
-    SERIALIZE_CONTAINER(vecPredRegs);
-
-    const size_t numInts = regClasses.at(IntRegClass)->size();
-    RegVal intRegs[numInts];
-    for (auto &id: *regClasses.at(IntRegClass))
-        intRegs[id.index()] = tc.getRegFlat(id);
-    SERIALIZE_ARRAY(intRegs, numInts);
-
-    const size_t numCcs = regClasses.at(CCRegClass)->size();
-    if (numCcs) {
-        RegVal ccRegs[numCcs];
-        for (auto &id: *regClasses.at(CCRegClass))
-            ccRegs[id.index()] = tc.getRegFlat(id);
-        SERIALIZE_ARRAY(ccRegs, numCcs);
+        arrayParamOut(cp, std::string("regs.") + reg_class->name(), regs,
+                reg_count);
     }

     tc.pcState().serialize(cp);
@@ -257,40 +233,19 @@
 void
 unserialize(ThreadContext &tc, CheckpointIn &cp)
 {
-    const auto &regClasses = tc.getIsaPtr()->regClasses();
+    for (const auto *reg_class: tc.getIsaPtr()->regClasses()) {
+        const size_t reg_bytes = reg_class->regBytes();
+        const size_t reg_count = reg_class->size();

-    const size_t numFloats = regClasses.at(FloatRegClass)->size();
-    RegVal floatRegs[numFloats];
-    // This is a bit ugly, but needed to maintain backwards
-    // compatibility.
-    arrayParamIn(cp, "floatRegs.i", floatRegs, numFloats);
-    for (auto &id: *regClasses.at(FloatRegClass))
-        tc.setRegFlat(id, floatRegs[id.index()]);
+        uint8_t regs[reg_count * reg_bytes];
+        arrayParamIn(cp, std::string("regs.") + reg_class->name(), regs,
+                reg_count);

-    const size_t numVecs = regClasses.at(VecRegClass)->size();
-    std::vector<TheISA::VecRegContainer> vecRegs(numVecs);
-    UNSERIALIZE_CONTAINER(vecRegs);
-    for (auto &id: *regClasses.at(VecRegClass))
-        tc.setRegFlat(id, &vecRegs[id.index()]);
-
-    const size_t numPreds = regClasses.at(VecPredRegClass)->size();
-    std::vector<TheISA::VecPredRegContainer> vecPredRegs(numPreds);
-    UNSERIALIZE_CONTAINER(vecPredRegs);
-    for (auto &id: *regClasses.at(VecPredRegClass))
-        tc.setRegFlat(id, &vecPredRegs[id.index()]);
-
-    const size_t numInts = regClasses.at(IntRegClass)->size();
-    RegVal intRegs[numInts];
-    UNSERIALIZE_ARRAY(intRegs, numInts);
-    for (auto &id: *regClasses.at(IntRegClass))
-        tc.setRegFlat(id, intRegs[id.index()]);
-
-    const size_t numCcs = regClasses.at(CCRegClass)->size();
-    if (numCcs) {
-        RegVal ccRegs[numCcs];
-        UNSERIALIZE_ARRAY(ccRegs, numCcs);
-        for (auto &id: *regClasses.at(CCRegClass))
-            tc.setRegFlat(id, ccRegs[id.index()]);
+        auto *reg_ptr = regs;
+        for (const auto &id: *reg_class) {
+            tc.setRegFlat(id, reg_ptr);
+            reg_ptr += reg_bytes;
+        }
     }

     TheISA::PCState pcState;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I61dbd7825ffe35c41e1b7c8317590d06c21b4513
Gerrit-Change-Number: 50252
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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