Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/50342 )
Change subject: misc: Move MemPool based calls to the SEWorkload.
......................................................................
misc: Move MemPool based calls to the SEWorkload.
These currently proxy to the System object, but this is one step towards
moving the MemPool-s out of the System and into the SEWorkload where
they really should have been from the start.
Change-Id: Id27e7b874c283abf07bd892c8467a9cc52e2fdff
---
M src/arch/x86/process.cc
M src/gpu-compute/gpu_compute_driver.cc
M src/kern/linux/linux.cc
M src/mem/multi_level_page_table.hh
M src/sim/process.cc
M src/sim/se_workload.cc
M src/sim/se_workload.hh
7 files changed, 43 insertions(+), 14 deletions(-)
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index a50b3bf..c646c02 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -179,12 +179,12 @@
if (kvmInSE) {
PortProxy physProxy = system->physProxy;
- Addr syscallCodePhysAddr = system->allocPhysPages(1);
- Addr gdtPhysAddr = system->allocPhysPages(1);
- Addr idtPhysAddr = system->allocPhysPages(1);
- Addr istPhysAddr = system->allocPhysPages(1);
- Addr tssPhysAddr = system->allocPhysPages(1);
- Addr pfHandlerPhysAddr = system->allocPhysPages(1);
+ Addr syscallCodePhysAddr = seWorkload->allocPhysPages(1);
+ Addr gdtPhysAddr = seWorkload->allocPhysPages(1);
+ Addr idtPhysAddr = seWorkload->allocPhysPages(1);
+ Addr istPhysAddr = seWorkload->allocPhysPages(1);
+ Addr tssPhysAddr = seWorkload->allocPhysPages(1);
+ Addr pfHandlerPhysAddr = seWorkload->allocPhysPages(1);
/*
* Set up the gdt.
diff --git a/src/gpu-compute/gpu_compute_driver.cc
b/src/gpu-compute/gpu_compute_driver.cc
index 52a437a..3adfadd 100644
--- a/src/gpu-compute/gpu_compute_driver.cc
+++ b/src/gpu-compute/gpu_compute_driver.cc
@@ -52,6 +52,7 @@
#include "params/GPUComputeDriver.hh"
#include "sim/full_system.hh"
#include "sim/process.hh"
+#include "sim/se_workload.hh"
#include "sim/syscall_emul_buf.hh"
namespace gem5
@@ -758,7 +759,8 @@
// this as uncacheable from the CPU so that we can
implement
// direct CPU framebuffer access similar to what we
currently
// offer in real HW through the so-called Large BAR
feature.
- pa_addr = process->system->allocPhysPages(npages,
dGPUPoolID);
+ pa_addr = process->seWorkload->allocPhysPages(
+ npages, dGPUPoolID);
//
// TODO: Uncacheable accesses need to be supported by the
// CPU-side protocol for this to work correctly. I believe
@@ -773,7 +775,7 @@
mmap_offset = args->mmap_offset;
// USERPTR allocations are system memory mapped into GPUVM
// space. The user provides the driver with the pointer.
- pa_addr = process->system->allocPhysPages(npages);
+ pa_addr = process->seWorkload->allocPhysPages(npages);
DPRINTF(GPUDriver, "Mapping VA %p to framebuffer PA %p
size "
"%d\n", args->va_addr, pa_addr, args->size);
@@ -794,7 +796,7 @@
// We will lazily map it into host memory on first touch.
The
// fixupFault will find the original SVM aperture mapped
to the
// host.
- pa_addr = process->system->allocPhysPages(npages);
+ pa_addr = process->seWorkload->allocPhysPages(npages);
DPRINTF(GPUDriver, "Mapping VA %p to framebuffer PA %p
size "
"%d\n", args->va_addr, pa_addr, args->size);
diff --git a/src/kern/linux/linux.cc b/src/kern/linux/linux.cc
index 17b74d2..1a54c9c 100644
--- a/src/kern/linux/linux.cc
+++ b/src/kern/linux/linux.cc
@@ -36,6 +36,7 @@
#include "debug/SyscallVerbose.hh"
#include "sim/mem_state.hh"
#include "sim/process.hh"
+#include "sim/se_workload.hh"
#include "sim/system.hh"
#include "sim/vma.hh"
@@ -94,8 +95,8 @@
Linux::procMeminfo(Process *process, ThreadContext *tc)
{
return csprintf("MemTotal:%12d kB\nMemFree: %12d kB\n",
- process->system->memSize() >> 10,
- process->system->freeMemSize() >> 10);
+ process->seWorkload->memSize() >> 10,
+ process->seWorkload->freeMemSize() >> 10);
}
std::string
diff --git a/src/mem/multi_level_page_table.hh
b/src/mem/multi_level_page_table.hh
index b8f8d4b..f482f8c 100644
--- a/src/mem/multi_level_page_table.hh
+++ b/src/mem/multi_level_page_table.hh
@@ -39,6 +39,7 @@
#include "base/types.hh"
#include "debug/MMU.hh"
#include "mem/page_table.hh"
+#include "sim/se_workload.hh"
#include "sim/system.hh"
namespace gem5
@@ -106,7 +107,9 @@
Addr
prepTopTable(System *system, Addr pageSize)
{
- Addr addr = system->allocPhysPages(First::tableSize());
+ auto *se_workload = dynamic_cast<SEWorkload *>(system->workload);
+ fatal_if(!se_workload, "Couldn't find an appropriate workload
object.");
+ Addr addr = se_workload->allocPhysPages(First::tableSize());
PortProxy &p = system->physProxy;
p.memsetBlob(addr, 0, First::tableSize() * pageSize);
return addr;
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 8be5940..71bb494 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -332,7 +332,7 @@
}
int npages = divCeil(size, pTable->pageSize());
- Addr paddr = system->allocPhysPages(npages);
+ Addr paddr = seWorkload->allocPhysPages(npages);
pTable->map(vaddr, paddr, size,
clobber ? EmulationPageTable::Clobber :
EmulationPageTable::MappingFlags(0));
@@ -343,7 +343,7 @@
ThreadContext *new_tc, bool allocate_page)
{
if (allocate_page)
- new_paddr = system->allocPhysPages(1);
+ new_paddr = seWorkload->allocPhysPages(1);
// Read from old physical page.
uint8_t buf_p[pTable->pageSize()];
diff --git a/src/sim/se_workload.cc b/src/sim/se_workload.cc
index 4148250..c2b48d1 100644
--- a/src/sim/se_workload.cc
+++ b/src/sim/se_workload.cc
@@ -30,6 +30,7 @@
#include "cpu/thread_context.hh"
#include "params/SEWorkload.hh"
#include "sim/process.hh"
+#include "sim/system.hh"
namespace gem5
{
@@ -43,4 +44,22 @@
tc->getProcessPtr()->syscall(tc);
}
+Addr
+SEWorkload::allocPhysPages(int npages, int pool_id)
+{
+ return system->allocPhysPages(npages, pool_id);
+}
+
+Addr
+SEWorkload::memSize(int pool_id) const
+{
+ return system->memSize(pool_id);
+}
+
+Addr
+SEWorkload::freeMemSize(int pool_id) const
+{
+ return system->freeMemSize(pool_id);
+}
+
} // namespace gem5
diff --git a/src/sim/se_workload.hh b/src/sim/se_workload.hh
index a3e4df0..8fc443c 100644
--- a/src/sim/se_workload.hh
+++ b/src/sim/se_workload.hh
@@ -78,6 +78,10 @@
// For now, assume the only type of events are system calls.
void event(ThreadContext *tc) override { syscall(tc); }
+
+ Addr allocPhysPages(int npages, int pool_id=0);
+ Addr memSize(int pool_id=0) const;
+ Addr freeMemSize(int pool_id=0) const;
};
} // namespace gem5
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/50342
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id27e7b874c283abf07bd892c8467a9cc52e2fdff
Gerrit-Change-Number: 50342
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
