Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/51019 )
Change subject: arch-arm: Add missing Armv8.3 extensions to the enum
......................................................................
arch-arm: Add missing Armv8.3 extensions to the enum
Change-Id: Id3897c59a12189f4aac6a3923f656e1f6b8f6723
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
---
M src/arch/arm/ArmSystem.py
M src/arch/arm/isa.cc
M src/arch/arm/ArmISA.py
3 files changed, 53 insertions(+), 1 deletion(-)
diff --git a/src/arch/arm/ArmISA.py b/src/arch/arm/ArmISA.py
index e98041c..66133bf 100644
--- a/src/arch/arm/ArmISA.py
+++ b/src/arch/arm/ArmISA.py
@@ -47,7 +47,15 @@
class ArmDefaultSERelease(ArmRelease):
extensions = [
- 'CRYPTO', 'FEAT_SVE', 'FEAT_LSE', 'FEAT_RDM', 'TME'
+ 'CRYPTO',
+ # Armv8.1
+ 'FEAT_LSE', 'FEAT_RDM',
+ # Armv8.2
+ 'FEAT_SVE',
+ # Armv8.3
+ 'FEAT_FCMA', 'FEAT_JSCVT', 'FEAT_PAuth',
+ # Other
+ 'TME'
]
class ArmISA(BaseISA):
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index 837124b..9ac533c 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -59,6 +59,11 @@
'FEAT_LVA', # Optional in Armv8.2
'FEAT_LPA', # Optional in Armv8.2
+ # Armv8.3
+ 'FEAT_FCMA',
+ 'FEAT_JSCVT',
+ 'FEAT_PAuth',
+
# Armv8.4
'FEAT_SEL2',
@@ -107,6 +112,8 @@
'FEAT_LSE', 'FEAT_PAN', 'FEAT_HPDS', 'FEAT_VMID16', 'FEAT_RDM',
# Armv8.2
'FEAT_UAO', 'FEAT_LVA', 'FEAT_LPA', 'FEAT_SVE',
+ # Armv8.3
+ 'FEAT_FCMA', 'FEAT_JSCVT', 'FEAT_PAuth',
# Armv8.4
'FEAT_SEL2'
]
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 6691901..c1be1a7 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -361,6 +361,15 @@
miscRegs[MISCREG_ID_ISAR5] = insertBits(
miscRegs[MISCREG_ID_ISAR5], 27, 24,
release->has(ArmExtension::FEAT_RDM) ? 0x1 : 0x0);
+ // FCMA
+ miscRegs[MISCREG_ID_ISAR5] = insertBits(
+ miscRegs[MISCREG_ID_ISAR5], 31, 28,
+ release->has(ArmExtension::FEAT_FCMA) ? 0x1 : 0x0);
+
+ /** ID_ISAR6 */
+ miscRegs[MISCREG_ID_ISAR6] = insertBits(
+ miscRegs[MISCREG_ID_ISAR6], 3, 0,
+ release->has(ArmExtension::FEAT_JSCVT) ? 0x1 : 0x0);
}
void
@@ -437,6 +446,24 @@
miscRegs[MISCREG_ID_AA64ISAR0_EL1], 31, 28,
release->has(ArmExtension::FEAT_RDM) ? 0x1 : 0x0);
+ /** MISCREG_ID_AA64ISAR1_EL1 */
+ // PAuth, APA
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1] = insertBits(
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1], 7, 4,
+ release->has(ArmExtension::FEAT_PAuth) ? 0x1 : 0x0);
+ // JSCVT
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1] = insertBits(
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1], 15, 12,
+ release->has(ArmExtension::FEAT_JSCVT) ? 0x1 : 0x0);
+ // FCMA
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1] = insertBits(
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1], 19, 16,
+ release->has(ArmExtension::FEAT_FCMA) ? 0x1 : 0x0);
+ // PAuth, GPA
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1] = insertBits(
+ miscRegs[MISCREG_ID_AA64ISAR1_EL1], 27, 24,
+ release->has(ArmExtension::FEAT_PAuth) ? 0x1 : 0x0);
+
/** MISCREG_ID_AA64MMFR1_EL1 */
// VMID16
miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id3897c59a12189f4aac6a3923f656e1f6b8f6723
Gerrit-Change-Number: 51019
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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