Mahyar Samani has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/51287 )
Change subject: misc: Adding multi-channel memory to components library
......................................................................
misc: Adding multi-channel memory to components library
This change adds source code for multi-channel memory in the
components library.
Change-Id: I52b5462939d4d2d1657c85394bd83afdb509a0b0
---
A src/python/gem5/components/memory/multi_channel.py
1 file changed, 115 insertions(+), 0 deletions(-)
diff --git a/src/python/gem5/components/memory/multi_channel.py
b/src/python/gem5/components/memory/multi_channel.py
new file mode 100644
index 0000000..f5e3db5
--- /dev/null
+++ b/src/python/gem5/components/memory/multi_channel.py
@@ -0,0 +1,103 @@
+# Copyright (c) 2021 The Regents of the University of California
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from math import log
+from typing import Type
+from m5.util.convert import toMemorySize
+from abstract_memory_system import AbstractMemorySystem
+from m5.objects import AddrRange, DRAMInterface, MemCtrl
+
+class MultiChannelMemory(AbstractMemorySystem):
+ def __init__(
+ self,
+ dram_interface_class: Type[DRAMInterface],
+ num_channels: int,
+ size: Optional[str] = None,
+ addr_mapping: Optional[str] = None,
+ interleaving_size: Optional[int] = None,
+ ) -> None:
+ super().__init__()
+ self._dram_class = dram_interface_class
+ self._num_channels = num_channels
+
+ if interleaving_size:
+ self._intlv_size = interleaving_size
+ else:
+ self._intlv_size = 64
+
+ if addr_mapping:
+ self._addr_mapping = addr_mapping
+ else:
+ self._addr_mapping = self._dram_class.addr_mapping
+
+ if size:
+ self._size = toMemorySize(size)
+ else:
+ self._size = _get_dram_size(num_channels, self._dram_class)
+
+ self.mem_range = AddrRange(size)
+
+ self._dram = [
+ self._dram_class(addr_mapping=self._addr_mapping)
+ for _ in range(num_channels)
+ ]
+ self.mem_ctrl = [
+ MemCtrl(dram=self._dram[i]) for i in range(num_channels)
+ ]
+
+ def _get_dram_size(num_channels: int, dram: DRAMInterface) -> int:
+ return num_channels * (
+ dram.device_size.value
+ * dram.devices_per_rank.value
+ * dram.ranks_per_channel.value
+ )
+
+ def _interleave_addresses(self):
+ if self._addr_mapping == "RoRaBaChCo":
+ rowbuffer_size = (
+ self._dram_class.device_rowbuffer_size.value
+ * self._dram_class.devices_per_rank.value
+ )
+ intlv_low_bit = log(rowbuffer_size, 2)
+ elif self._addr_mapping in ["RoRaBaCoCh", "RoCoRaBaCh"]:
+ intlv_low_bit = 0
+ else:
+ raise ValueError(
+ "Only these address mappings are supported: "
+ "RoRaBaChCo, RoRaBaCoCh, RoCoRaBaCh"
+ )
+
+ intlv_bits = log(self._intlv_size)
+
+ for i in range(self._num_channels):
+ self._dram[i].range = AddrRange(
+ self.mem_range.start,
+ size=self.mem_range.size(),
+ intlvHighBit=intlv_low_bit + intlv_bits - 1,
+ xorHighBit=20,
+ intlvBits=intlv_bits,
+ intlvMatch=i,
+ )
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I52b5462939d4d2d1657c85394bd83afdb509a0b0
Gerrit-Change-Number: 51287
Gerrit-PatchSet: 1
Gerrit-Owner: Mahyar Samani <[email protected]>
Gerrit-MessageType: newchange
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