Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/51531 )
Change subject: cpu: Eliminate the unused hasBranchTarget method in
StaticInst.
......................................................................
cpu: Eliminate the unused hasBranchTarget method in StaticInst.
This was once used to implement GDB single stepping back when it was
reimplemented for each ISA, but has not been used since 2014 when that
code was refactored.
Change-Id: If37ccfec2c43a33320d753c68892aa6fefd16b4f
---
M src/cpu/static_inst.cc
M src/cpu/static_inst.hh
2 files changed, 13 insertions(+), 24 deletions(-)
diff --git a/src/cpu/static_inst.cc b/src/cpu/static_inst.cc
index 903e3d7..1580759 100644
--- a/src/cpu/static_inst.cc
+++ b/src/cpu/static_inst.cc
@@ -33,23 +33,6 @@
namespace gem5
{
-bool
-StaticInst::hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc,
- TheISA::PCState &tgt) const
-{
- if (isDirectCtrl()) {
- tgt = branchTarget(pc);
- return true;
- }
-
- if (isIndirectCtrl()) {
- tgt = branchTarget(tc);
- return true;
- }
-
- return false;
-}
-
StaticInstPtr
StaticInst::fetchMicroop(MicroPC upc) const
{
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index f63baf2..2039644 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -352,13 +352,6 @@
virtual TheISA::PCState branchTarget(ThreadContext *tc) const;
/**
- * Return true if the instruction is a control transfer, and if so,
- * return the target address as well.
- */
- bool hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc,
- TheISA::PCState &tgt) const;
-
- /**
* Return string representation of disassembled instruction.
* The default version of this function will call the internal
* virtual generateDisassembly() function to get the string,
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: If37ccfec2c43a33320d753c68892aa6fefd16b4f
Gerrit-Change-Number: 51531
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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