Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/52066 )

Change subject: arch,cpu: Make branching() a virtual member of PCStateBase.
......................................................................

arch,cpu: Make branching() a virtual member of PCStateBase.

Change-Id: I4422d07024e97dbd67e97ad95a16e1b06fd6be12
---
M src/arch/x86/pcstate.hh
M src/arch/generic/pcstate.hh
M src/arch/arm/pcstate.hh
M src/cpu/o3/fetch.cc
M src/cpu/o3/iew.cc
M src/arch/riscv/pcstate.hh
M src/cpu/simple/base.cc
7 files changed, 20 insertions(+), 12 deletions(-)



diff --git a/src/arch/arm/pcstate.hh b/src/arch/arm/pcstate.hh
index f2d85d2..7b75ed8 100644
--- a/src/arch/arm/pcstate.hh
+++ b/src/arch/arm/pcstate.hh
@@ -196,7 +196,7 @@
     uint8_t size() const { return _size; }

     bool
-    branching() const
+    branching() const override
     {
         return ((this->pc() + this->size()) != this->npc());
     }
diff --git a/src/arch/generic/pcstate.hh b/src/arch/generic/pcstate.hh
index b41c9c3..c351c5e 100644
--- a/src/arch/generic/pcstate.hh
+++ b/src/arch/generic/pcstate.hh
@@ -126,6 +126,7 @@
     }

     virtual void advance() = 0;
+    virtual bool branching() const = 0;

     void
     serialize(CheckpointOut &cp) const override
@@ -367,7 +368,7 @@
     explicit SimplePCState(Addr val) { set(val); }

     bool
-    branching() const
+    branching() const override
     {
         return this->npc() != this->pc() + InstWidth;
     }
@@ -416,7 +417,7 @@
     explicit UPCState(Addr val) { set(val); }

     bool
-    branching() const
+    branching() const override
     {
         return this->npc() != this->pc() + InstWidth ||
                this->nupc() != this->upc() + 1;
@@ -488,7 +489,7 @@
     explicit DelaySlotPCState(Addr val) { set(val); }

     bool
-    branching() const
+    branching() const override
     {
         return !(this->nnpc() == this->npc() + InstWidth &&
                  (this->npc() == this->pc() + InstWidth ||
@@ -561,7 +562,7 @@
     explicit DelaySlotUPCState(Addr val) { set(val); }

     bool
-    branching() const
+    branching() const override
     {
         return Base::branching() || this->nupc() != this->upc() + 1;
     }
diff --git a/src/arch/riscv/pcstate.hh b/src/arch/riscv/pcstate.hh
index 53b358c..0125507 100644
--- a/src/arch/riscv/pcstate.hh
+++ b/src/arch/riscv/pcstate.hh
@@ -77,7 +77,7 @@
     bool rv32() const { return _rv32; }

     bool
-    branching() const
+    branching() const override
     {
         if (_compressed) {
             return npc() != pc() + 2 || nupc() != upc() + 1;
diff --git a/src/arch/x86/pcstate.hh b/src/arch/x86/pcstate.hh
index bfc7d4f..a0ed6ff 100644
--- a/src/arch/x86/pcstate.hh
+++ b/src/arch/x86/pcstate.hh
@@ -88,7 +88,7 @@
     void size(uint8_t newSize) { _size = newSize; }

     bool
-    branching() const
+    branching() const override
     {
         return (this->npc() != this->pc() + size()) ||
                (this->nupc() != this->upc() + 1);
diff --git a/src/cpu/o3/fetch.cc b/src/cpu/o3/fetch.cc
index 89de973..5646e64 100644
--- a/src/cpu/o3/fetch.cc
+++ b/src/cpu/o3/fetch.cc
@@ -1283,7 +1283,7 @@

             // If we're branching after this instruction, quit fetching
             // from the same block.
-            predictedBranch |= this_pc.as<TheISA::PCState>().branching();
+            predictedBranch |= this_pc.branching();
predictedBranch |= lookupAndUpdateNextPC(instruction, *next_pc);
             if (predictedBranch) {
                 DPRINTF(Fetch, "Branch detected with PC = %s\n", this_pc);
diff --git a/src/cpu/o3/iew.cc b/src/cpu/o3/iew.cc
index e159204..2795919 100644
--- a/src/cpu/o3/iew.cc
+++ b/src/cpu/o3/iew.cc
@@ -461,8 +461,7 @@
             inst->seqNum < toCommit->squashedSeqNum[tid]) {
         toCommit->squash[tid] = true;
         toCommit->squashedSeqNum[tid] = inst->seqNum;
-        toCommit->branchTaken[tid] =
-            inst->pcState().as<TheISA::PCState>().branching();
+        toCommit->branchTaken[tid] = inst->pcState().branching();

         set(toCommit->pc[tid], inst->pcState());
         inst->staticInst->advancePC(*toCommit->pc[tid]);
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 84c729e..0f11eb9 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -461,8 +461,7 @@
     SimpleExecContext &t_info = *threadInfo[curThread];
     SimpleThread* thread = t_info.thread;

-    const bool branching =
-        thread->pcState().as<TheISA::PCState>().branching();
+    const bool branching = thread->pcState().branching();

     //Since we're moving to a new pc, zero out the offset
     t_info.fetchOffset = 0;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/52066
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4422d07024e97dbd67e97ad95a16e1b06fd6be12
Gerrit-Change-Number: 52066
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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