Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/52030 )
Change subject: arch: Use the actual ISA namespace for PCState in the
parser.
......................................................................
arch: Use the actual ISA namespace for PCState in the parser.
Change-Id: Id716c809fb6a33b170727c0e08fc15019f2468c6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52030
Reviewed-by: Daniel Carvalho <[email protected]>
Maintainer: Gabe Black <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/isa_parser/operand_types.py
M src/arch/isa_parser/isa_parser.py
2 files changed, 23 insertions(+), 6 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/isa_parser/isa_parser.py
b/src/arch/isa_parser/isa_parser.py
index e084045..a110395 100755
--- a/src/arch/isa_parser/isa_parser.py
+++ b/src/arch/isa_parser/isa_parser.py
@@ -121,9 +121,11 @@
&std::remove_pointer_t<decltype(this)>::destRegIdxArr));
'''
+ pcstate_decl = f'{self.parser.namespace}::PCState ' \
+ '__parserAutoPCState;\n'
myDict['op_decl'] = operands.concatAttrStrings('op_decl')
if operands.readPC or operands.setPC:
- myDict['op_decl'] += 'TheISA::PCState
__parserAutoPCState;\n'
+ myDict['op_decl'] += pcstate_decl
# In case there are predicated register reads and write,
declare
# the variables for register indicies. It is being assumed that
@@ -144,11 +146,9 @@
myDict['op_dest_decl'] = \
operands.concatSomeAttrStrings(is_dest, 'op_dest_decl')
if operands.readPC:
- myDict['op_src_decl'] += \
- 'TheISA::PCState __parserAutoPCState;\n'
+ myDict['op_src_decl'] += pcstate_decl
if operands.setPC:
- myDict['op_dest_decl'] += \
- 'TheISA::PCState __parserAutoPCState;\n'
+ myDict['op_dest_decl'] += pcstate_decl
myDict['op_rd'] = operands.concatAttrStrings('op_rd')
if operands.readPC:
diff --git a/src/arch/isa_parser/operand_types.py
b/src/arch/isa_parser/operand_types.py
index bed58d7..bc78154 100755
--- a/src/arch/isa_parser/operand_types.py
+++ b/src/arch/isa_parser/operand_types.py
@@ -737,6 +737,10 @@
return ''
class PCStateOperand(Operand):
+ def __init__(self, parser, *args, **kwargs):
+ super(PCStateOperand, self).__init__(parser, *args, **kwargs)
+ self.parser = parser
+
def makeConstructor(self, predRead, predWrite):
return ''
@@ -759,7 +763,7 @@
return 'xc->pcState(%s);\n' % self.base_name
def makeDecl(self):
- ctype = 'TheISA::PCState'
+ ctype = f'{self.parser.namespace}::PCState'
if self.isPCPart():
ctype = self.ctype
# Note that initializations in the declarations are solely
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/52030
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id716c809fb6a33b170727c0e08fc15019f2468c6
Gerrit-Change-Number: 52030
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
