Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/52496 )
Change subject: arch-x86: Make x86 respect m5op_base in SE mode.
......................................................................
arch-x86: Make x86 respect m5op_base in SE mode.
In SE mode, we can reasonably hard code what virtual address the m5ops
show up at since that's private to the process, but we should respect
the external setting of what physical address to use.
Change-Id: I2ed9e5ba8c411e22e1d5163cf2ab875f9e2fe387
---
M src/arch/x86/se_workload.hh
M src/arch/x86/process.cc
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index c646c02..90d3f7d 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -518,8 +518,11 @@
/* PF handler */
pTable->map(PFHandlerVirtAddr, pfHandlerPhysAddr, PageBytes,
false);
/* MMIO region for m5ops */
- pTable->map(MMIORegionVirtAddr, MMIORegionPhysAddr,
- 16 * PageBytes, false);
+ auto m5op_range = system->m5opRange();
+ if (m5op_range.size()) {
+ pTable->map(MMIORegionVirtAddr, m5op_range.start(),
+ m5op_range.size(), false);
+ }
} else {
for (int i = 0; i < contextIds.size(); i++) {
ThreadContext * tc = system->threads[contextIds[i]];
diff --git a/src/arch/x86/se_workload.hh b/src/arch/x86/se_workload.hh
index 49ddf20..0795a51 100644
--- a/src/arch/x86/se_workload.hh
+++ b/src/arch/x86/se_workload.hh
@@ -45,7 +45,6 @@
const Addr ISTVirtAddr = 0xffff800000004000;
const Addr PFHandlerVirtAddr = 0xffff800000005000;
const Addr MMIORegionVirtAddr = 0xffffc90000000000;
-const Addr MMIORegionPhysAddr = 0xffff0000;
} // namespace X86ISA
} // namespace gem5
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2ed9e5ba8c411e22e1d5163cf2ab875f9e2fe387
Gerrit-Change-Number: 52496
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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