Hi Arthur, this is a known issue in disassembling and arises when multiple register operands have different width. For example your load is likely using the 64-bit SP as base register and loading the value into 32-bit w1.
Gem5 is not capturing this per-operand-width and it is reporting a single intWidth of 64. A proper fix would involve having a per-operand intWidth variable (or something similar) Kind Regards Giacomo From: Arthur Perais via gem5-dev <[email protected]> Date: Tuesday, 30 November 2021 at 17:06 To: [email protected] <[email protected]> Cc: Arthur Perais <[email protected]> Subject: [gem5-dev] Incorrect disassembly/register width in Aarch64 ? Hi all, I am using a fairly old gem5 version (566c113de1eb08ccbfba6e4b074f96c9977a0e16 from Nov 2020), but I noticed that the disassembly (and the register width) of some Aarch64 instructions seems to be incorrectly reported by gem5. Notably, instruction : ldr w1, [sp, #168] (0xb940abe1 according to objdump) Is reported in gem5 as ldr x1, [sp, #168] (0xf94057e1 according to objdump) And the getIntWidth() method that can be called on the staticInst reports 64 (when it reports 32 for instructions that write into a "word" register). I have not found a patch addressing this but maybe this has been fixed already, or maybe this is known to happen under some specific configuration of an Aarch64 system. Best, Arthur Perais _______________________________________________ gem5-dev mailing list -- [email protected] To unsubscribe send an email to [email protected] %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
_______________________________________________ gem5-dev mailing list -- [email protected] To unsubscribe send an email to [email protected] %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
