Alex Richardson has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/55403 )
Change subject: arch-riscv: Add an ostream operator for PrivilegeMode
......................................................................
arch-riscv: Add an ostream operator for PrivilegeMode
This makes it easier to use the current privilege mode in error messages.
Change-Id: I425d45d3957a70d8afb6cbde18955fae1461c960
---
M src/arch/riscv/isa.cc
M src/arch/riscv/isa.hh
2 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/src/arch/riscv/isa.cc b/src/arch/riscv/isa.cc
index c8b752c..f49a2a8 100644
--- a/src/arch/riscv/isa.cc
+++ b/src/arch/riscv/isa.cc
@@ -575,3 +575,17 @@
} // namespace RiscvISA
} // namespace gem5
+
+std::ostream &
+operator<<(std::ostream &os, gem5::RiscvISA::PrivilegeMode pm)
+{
+ switch (pm) {
+ case gem5::RiscvISA::PRV_U:
+ return os << "PRV_U";
+ case gem5::RiscvISA::PRV_S:
+ return os << "PRV_S";
+ case gem5::RiscvISA::PRV_M:
+ return os << "PRV_M";
+ }
+ return os << "PRV_<invalid>";
+}
diff --git a/src/arch/riscv/isa.hh b/src/arch/riscv/isa.hh
index 143cc69..81923b5 100644
--- a/src/arch/riscv/isa.hh
+++ b/src/arch/riscv/isa.hh
@@ -119,4 +119,6 @@
} // namespace RiscvISA
} // namespace gem5
+std::ostream &operator<<(std::ostream &os, gem5::RiscvISA::PrivilegeMode
pm);
+
#endif // __ARCH_RISCV_ISA_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I425d45d3957a70d8afb6cbde18955fae1461c960
Gerrit-Change-Number: 55403
Gerrit-PatchSet: 1
Gerrit-Owner: Alex Richardson <[email protected]>
Gerrit-MessageType: newchange
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