Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/55885 )
Change subject: arch-x86: Implement protected mode pop into selector reg.
......................................................................
arch-x86: Implement protected mode pop into selector reg.
These are strongly based on the mov to segment selector instructions.
Change-Id: I0037583b8d8f4a53400c946aaa01d4406073e8fd
---
M src/arch/x86/isa/decoder/two_byte_opcodes.isa
M src/arch/x86/isa/decoder/one_byte_opcodes.isa
M src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
3 files changed, 43 insertions(+), 5 deletions(-)
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
index e490189..03fd4e8 100644
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
@@ -48,7 +48,7 @@
0x7: decode MODE_SUBMODE {
0x0: UD2();
0x3, 0x4: POP_REAL(sEv);
- default: WarnUnimpl::pop_ES();
+ default: POP(sEv);
}
default: MultiInst::ADD(OPCODE_OP_BOTTOM3,
[Eb,Gb], [Ev,Gv],
@@ -76,7 +76,7 @@
0x7: decode MODE_SUBMODE {
0x0: UD2();
0x3, 0x4: POP_REAL(sSv);
- default: WarnUnimpl::pop_SS();
+ default: POP(sSv);
}
default: MultiInst::ADC(OPCODE_OP_BOTTOM3,
[Eb,Gb], [Ev,Gv],
@@ -91,7 +91,7 @@
0x7: decode MODE_SUBMODE {
0x0: UD2();
0x3, 0x4: POP_REAL(sDv);
- default: WarnUnimpl::pop_DS();
+ default: POP(sDv);
}
default: MultiInst::SBB(OPCODE_OP_BOTTOM3,
[Eb,Gb], [Ev,Gv],
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index d2f763d..d87f1ff 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -673,7 +673,7 @@
0x0: Inst::PUSH(sFv);
0x1: decode MODE_SUBMODE {
0x3, 0x4: Inst::POP_REAL(sFv);
- default: pop_fs();
+ default: Inst::POP(sFv);
}
0x2: CPUIDInst::CPUID({{
CpuidResult result;
@@ -703,7 +703,7 @@
0x0: Inst::PUSH(sGv);
0x1: decode MODE_SUBMODE {
0x3, 0x4: Inst::POP_REAL(sGv);
- default: pop_gs();
+ default: Inst::POP(sGv);
}
0x2: rsm_smm();
0x3: Inst::BTS(Ev,Gv);
diff --git
a/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
b/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
index e97d17f..34833ca 100644
---
a/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
+++
b/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
@@ -73,6 +73,33 @@
wrbase sr, t1, dataSize=8
};
+def macroop POP_S {
+ # Make the default data size of pops 64 bits in 64 bit mode
+ .adjust_env oszIn64Override
+
+ ld t1, ss, [1, t0, rsp], addressSize=ssz, dataSize=2
+
+ andi t0, t1, 0xFC, flags=(EZF,), dataSize=2
+ br label("processDescriptor"), flags=(CEZF,)
+
+ andi t2, t1, 0xF8, dataSize=8
+ andi t0, t1, 0x4, flags=(EZF,), dataSize=2
+ br label("globalDescriptor")
+
+ ld t3, tsl, [1, t0, t2], dataSize=8, addressSize=8
+ br label("processDescriptor")
+
+globalDescriptor:
+ ld t3, tsg, [1, t0, t2], dataSize=8, addressSize=8
+
+processDescriptor:
+ chks t1, t3, dataSize=8
+ wrdl sr, t3, t1
+ wrsel sr, t1
+
+ addi rsp, rsp, dsz, dataSize=ssz
+};
+
def macroop PUSH_R {
# Make the default data size of pops 64 bits in 64 bit mode
.adjust_env oszIn64Override
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0037583b8d8f4a53400c946aaa01d4406073e8fd
Gerrit-Change-Number: 55885
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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