Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/56598 )
Change subject: cpu: Rename initiateHtmCmd to be more generic
......................................................................
cpu: Rename initiateHtmCmd to be more generic
To prepare for future CHI work, rename ExecContext::initiateHtmCmd to
ExecContext::initiateSpecialMemCmd
JIRA: https://gem5.atlassian.net/browse/GEM5-1097
Change-Id: I7c7aed8ec06a66d9023c14dba37eae42907df222
---
M src/arch/arm/insts/tme64ruby.cc
M src/cpu/checker/cpu.hh
M src/cpu/exec_context.hh
M src/cpu/minor/exec_context.hh
M src/cpu/o3/dyn_inst.cc
M src/cpu/o3/dyn_inst.hh
M src/cpu/simple/atomic.hh
M src/cpu/simple/base.hh
M src/cpu/simple/exec_context.hh
M src/cpu/simple/timing.cc
M src/cpu/simple/timing.hh
11 files changed, 55 insertions(+), 31 deletions(-)
diff --git a/src/arch/arm/insts/tme64ruby.cc
b/src/arch/arm/insts/tme64ruby.cc
index 12cc878..95a7da2 100644
--- a/src/arch/arm/insts/tme64ruby.cc
+++ b/src/arch/arm/insts/tme64ruby.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020 ARM Limited
+ * Copyright (c) 2020-2021 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -77,7 +77,7 @@
memAccessFlags = memAccessFlags | Request::NO_ACCESS;
}
- fault = xc->initiateHtmCmd(memAccessFlags);
+ fault = xc->initiateSpecialMemCmd(memAccessFlags);
}
return fault;
@@ -175,7 +175,7 @@
Request::Flags memAccessFlags =
Request::STRICT_ORDER|Request::PHYSICAL|Request::HTM_CANCEL;
- fault = xc->initiateHtmCmd(memAccessFlags);
+ fault = xc->initiateSpecialMemCmd(memAccessFlags);
return fault;
}
@@ -231,7 +231,7 @@
memAccessFlags = memAccessFlags | Request::NO_ACCESS;
}
- fault = xc->initiateHtmCmd(memAccessFlags);
+ fault = xc->initiateSpecialMemCmd(memAccessFlags);
return fault;
}
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index b76c034..15a93f9 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -335,7 +335,7 @@
};
Fault
- initiateHtmCmd(Request::Flags flags) override
+ initiateSpecialMemCmd(Request::Flags flags) override
{
panic("not yet supported!");
return NoFault;
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index b88c895..781b500 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014, 2016-2018, 2020 ARM Limited
+ * Copyright (c) 2014, 2016-2018, 2020-2021 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -218,10 +218,14 @@
}
/**
- * Initiate an HTM command,
- * e.g. tell Ruby we're starting/stopping a transaction
+ * Initiate a Special memory command,
+ * which bypasses squashing and has no address.
+ * Examples include HTM commands and TLBI commands.
+ * e.g. tell Ruby we're starting/stopping a HTM transaction,
+ * or tell Ruby to issue a TLBI operation
*/
- virtual Fault initiateHtmCmd(Request::Flags flags) = 0;
+ virtual Fault initiateSpecialMemCmd(Request::Flags flags) = 0;
+
/**
* For atomic-mode contexts, perform an atomic memory write operation.
* For timing-mode contexts, initiate a timing memory write operation.
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 2773f9e..bf9b4b4 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2014, 2016-2018, 2020 ARM Limited
+ * Copyright (c) 2011-2014, 2016-2018, 2020-2021 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -117,9 +117,10 @@
}
Fault
- initiateHtmCmd(Request::Flags flags) override
+ initiateSpecialMemCmd(Request::Flags flags) override
{
- panic("ExecContext::initiateHtmCmd() not implemented on
MinorCPU\n");
+ panic("ExecContext::initiateSpecialMemCmd() not implemented "
+ " on MinorCPU\n");
return NoFault;
}
diff --git a/src/cpu/o3/dyn_inst.cc b/src/cpu/o3/dyn_inst.cc
index 4769896..8eb270a 100644
--- a/src/cpu/o3/dyn_inst.cc
+++ b/src/cpu/o3/dyn_inst.cc
@@ -410,7 +410,7 @@
}
Fault
-DynInst::initiateHtmCmd(Request::Flags flags)
+DynInst::initiateSpecialMemCmd(Request::Flags flags)
{
const unsigned int size = 8;
return cpu->pushRequest(
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index f97a525..0d4a56f 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010, 2016 ARM Limited
+ * Copyright (c) 2010, 2016, 2021 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -397,7 +397,7 @@
Fault initiateMemRead(Addr addr, unsigned size, Request::Flags flags,
const std::vector<bool> &byte_enable) override;
- Fault initiateHtmCmd(Request::Flags flags) override;
+ Fault initiateSpecialMemCmd(Request::Flags flags) override;
Fault writeMem(uint8_t *data, unsigned size, Addr addr,
Request::Flags flags, uint64_t *res,
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index c0d0f1d..d7ab9c2 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, 2015, 2018, 2020 ARM Limited
+ * Copyright (c) 2012-2013, 2015, 2018, 2020-2021 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@@ -224,10 +224,10 @@
override;
Fault
- initiateHtmCmd(Request::Flags flags) override
+ initiateSpecialMemCmd(Request::Flags flags) override
{
- panic("initiateHtmCmd() is for timing accesses, and should "
- "never be called on AtomicSimpleCPU.\n");
+ panic("initiateSpecialMemCmd() is for timing accesses, and "
+ "should never be called on AtomicSimpleCPU.\n");
}
void
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 45fd5ea..4949ebc 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012,2015,2018,2020 ARM Limited
+ * Copyright (c) 2011-2012,2015,2018,2020-2021 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -190,11 +190,16 @@
void serializeThread(CheckpointOut &cp, ThreadID tid) const override;
void unserializeThread(CheckpointIn &cp, ThreadID tid) override;
- /** Hardware transactional memory commands (HtmCmds), e.g. start a
+ /**
+ * Special memory commands such as hardware transactional memory
+ * commands (HtmCmds) or TLBI commands, e.g. start a
* transaction and commit a transaction, are memory operations but are
- * neither really (true) loads nor stores. For this reason the
interface
- * is extended and initiateHtmCmd() is used to instigate the command.
*/
- virtual Fault initiateHtmCmd(Request::Flags flags) = 0;
+ * neither really (true) loads nor stores.
+ * For this reason the interface is extended,
+ * and initiateSpecialMemCmd() is used to instigate the command.
+ */
+ virtual Fault initiateSpecialMemCmd(Request::Flags flags) = 0;
+
};
} // namespace gem5
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index d23bf51..5961fae 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -526,9 +526,9 @@
}
Fault
- initiateHtmCmd(Request::Flags flags) override
+ initiateSpecialMemCmd(Request::Flags flags) override
{
- return cpu->initiateHtmCmd(flags);
+ return cpu->initiateSpecialMemCmd(flags);
}
/**
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index d562c17..d791e3f 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -1,6 +1,6 @@
/*
* Copyright 2014 Google, Inc.
- * Copyright (c) 2010-2013,2015,2017-2018, 2020 ARM Limited
+ * Copyright (c) 2010-2013,2015,2017-2018, 2020-2021 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -1216,7 +1216,7 @@
}
Fault
-TimingSimpleCPU::initiateHtmCmd(Request::Flags flags)
+TimingSimpleCPU::initiateSpecialMemCmd(Request::Flags flags)
{
SimpleExecContext &t_info = *threadInfo[curThread];
SimpleThread* thread = t_info.thread;
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index b211ab1..3dbdcad 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013,2015,2018,2020 ARM Limited
+ * Copyright (c) 2012-2013,2015,2018,2020-2021 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -324,8 +324,8 @@
*/
void finishTranslation(WholeTranslationState *state);
- /** hardware transactional memory **/
- Fault initiateHtmCmd(Request::Flags flags) override;
+ /** hardware transactional memory & TLBI operations **/
+ Fault initiateSpecialMemCmd(Request::Flags flags) override;
void htmSendAbortSignal(ThreadID tid, uint64_t htm_uid,
HtmFailureFaultCause) override;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7c7aed8ec06a66d9023c14dba37eae42907df222
Gerrit-Change-Number: 56598
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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