Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/57196 )
Change subject: arch-x86: Refactor legacy int code so far call can use it.
......................................................................
arch-x86: Refactor legacy int code so far call can use it.
A far call through a call gate is mechanically very similar to how an
interrupt is vectored to. Refactor the legacy interrupt vectoring code
so that far calls can also use it.
Change-Id: Ice87e831d089e29cae931d7d212cd0d69aed769e
---
M src/arch/x86/microcode/romutil.ucode
1 file changed, 84 insertions(+), 64 deletions(-)
diff --git a/src/arch/x86/microcode/romutil.ucode
b/src/arch/x86/microcode/romutil.ucode
index b70cd5a..1352f03 100644
--- a/src/arch/x86/microcode/romutil.ucode
+++ b/src/arch/x86/microcode/romutil.ucode
@@ -178,62 +178,7 @@
def rom
{
- ############################################
- # Entry points for legacy mode interrupts. #
- ############################################
-extern legacyModeInterrupt:
- bsr "legacy_mode_int_get_gate"
-
- # Make sure the descriptor is a legal gate.
- chks t0, t0, t1, IntGateCheck, dataSize=8
- bsr "legacy_mode_int_work"
- br "legacy_mode_int_finalize"
-
-extern legacyModeSoftInterrupt:
- bsr "legacy_mode_int_get_gate"
-
- # Make sure the descriptor is a legal gate.
- chks t0, t0, t1, SoftIntGateCheck, dataSize=8
- bsr "legacy_mode_int_work"
- br "legacy_mode_int_finalize"
-
-extern legacyModeInterruptWithError:
- bsr "legacy_mode_int_get_gate"
-
- # Make sure the descriptor is a legal gate.
- chks t0, t0, t1, IntGateCheck, dataSize=8
- bsr "legacy_mode_int_work"
-
- # Push an appropriately sized error code onto the target stack.
-
- br "legacy_mode_int_push_ec_dsz_is_4", flags=(CECF,)
-
- subi t5, t5, 2, dataSize=ssz
- st t15, hs, [1, t0, t5], 0, dataSize=2, addressSize=ssz
- br "legacy_mode_int_finalize"
-
-legacy_mode_int_push_ec_dsz_is_4:
- subi t5, t5, 4, dataSize=ssz
- st t15, hs, [1, t0, t5], 0, dataSize=4, addressSize=ssz
- br "legacy_mode_int_finalize"
-
-
- ####################################################
- # A small helper to read in the gate from the IDT. #
- ####################################################
-legacy_mode_int_get_gate:
- # Load the gate descriptor from the IDT
- slli t1, t1, 3, dataSize=8
- ld t1, idtr, [1, t0, t1], dataSize=8, addressSize=8, atCPL0=True
-
- sret
-
-
- ##########################################
- # The majority of the work is done here. #
- ##########################################
-legacy_mode_int_work:
-
+extern legacyModeProcessGate:
# Starred values are already set on entry.
# *t1 = gate descriptor
# t2 = target offset
@@ -297,8 +242,7 @@
m_copy_seg_info dest="hs", source="ss", temp_reg="t8"
- br "legacy_mode_int_dsz_is_4", flags=(CECF,)
- br "legacy_mode_int_dsz_is_2"
+ sret
legacy_mode_int_stack_switch:
br "legacy_mode_int_switch_dsz_is_4", flags=(CECF,)
@@ -306,7 +250,74 @@
m_switch_legacy_stack new_ptr="t5", new_seg="hs", new_cpl="t4", \
temp_reg="t8", data_size=2
-legacy_mode_int_dsz_is_2:
+ sret
+
+legacy_mode_int_switch_dsz_is_4:
+ m_switch_legacy_stack new_ptr="t5", new_seg="hs", new_cpl="t4", \
+ temp_reg="t8", data_size=4
+
+ sret
+};
+
+def rom
+{
+ ############################################
+ # Entry points for legacy mode interrupts. #
+ ############################################
+extern legacyModeInterrupt:
+ bsr "legacy_mode_int_get_gate"
+
+ # Make sure the descriptor is a legal gate.
+ chks t0, t0, t1, IntGateCheck, dataSize=8
+ bsr "legacyModeProcessGate"
+ bsr "legacy_mode_int_push_frame"
+ br "legacy_mode_int_finalize"
+
+extern legacyModeSoftInterrupt:
+ bsr "legacy_mode_int_get_gate"
+
+ # Make sure the descriptor is a legal gate.
+ chks t0, t0, t1, SoftIntGateCheck, dataSize=8
+ bsr "legacyModeProcessGate"
+ bsr "legacy_mode_int_push_frame"
+ br "legacy_mode_int_finalize"
+
+extern legacyModeInterruptWithError:
+ bsr "legacy_mode_int_get_gate"
+
+ # Make sure the descriptor is a legal gate.
+ chks t0, t0, t1, IntGateCheck, dataSize=8
+ bsr "legacyModeProcessGate"
+ bsr "legacy_mode_int_push_frame"
+
+ # Push an appropriately sized error code onto the target stack.
+
+ br "legacy_mode_int_push_ec_dsz_is_4", flags=(CECF,)
+
+ subi t5, t5, 2, dataSize=ssz
+ st t15, hs, [1, t0, t5], 0, dataSize=2, addressSize=ssz
+ br "legacy_mode_int_finalize"
+
+legacy_mode_int_push_ec_dsz_is_4:
+ subi t5, t5, 4, dataSize=ssz
+ st t15, hs, [1, t0, t5], 0, dataSize=4, addressSize=ssz
+ br "legacy_mode_int_finalize"
+
+
+ ####################################################
+ # A small helper to read in the gate from the IDT. #
+ ####################################################
+legacy_mode_int_get_gate:
+ # Load the gate descriptor from the IDT
+ slli t1, t1, 3, dataSize=8
+ ld t1, idtr, [1, t0, t1], dataSize=8, addressSize=8, atCPL0=True
+
+ sret
+
+
+legacy_mode_int_push_frame:
+
+ br "legacy_mode_int_push_frame_dsz_is_4", flags=(CECF,)
st t6, hs, [1, t0, t5], -2, dataSize=2, addressSize=ssz
st t3, hs, [1, t0, t5], -4, dataSize=2, addressSize=ssz
@@ -315,11 +326,7 @@
sret
-legacy_mode_int_switch_dsz_is_4:
- m_switch_legacy_stack new_ptr="t5", new_seg="hs", new_cpl="t4", \
- temp_reg="t8", data_size=4
-
-legacy_mode_int_dsz_is_4:
+legacy_mode_int_push_frame_dsz_is_4:
st t6, hs, [1, t0, t5], -4, dataSize=4, addressSize=ssz
st t3, hs, [1, t0, t5], -8, dataSize=4, addressSize=ssz
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ice87e831d089e29cae931d7d212cd0d69aed769e
Gerrit-Change-Number: 57196
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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