Kyle Roarty has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57309 )

Change subject: configs: Update Vega properties file to use gem5 parameters
......................................................................

configs: Update Vega properties file to use gem5 parameters

Previously, some values were hardcoded which resulted in Vega
and the underlying ROCm runtime assuming a 64 CU config, even
when ran with a lower number of CUs in gem5.

This caused an error in DNNMark, where it looked for the wrong
cachefile database

Change-Id: I76cd1d04fd00df2b66c9ecfae9b364f553f5e5e4
---
M configs/example/hsaTopology.py
1 file changed, 49 insertions(+), 30 deletions(-)



diff --git a/configs/example/hsaTopology.py b/configs/example/hsaTopology.py
index b11a8df..b462b95 100644
--- a/configs/example/hsaTopology.py
+++ b/configs/example/hsaTopology.py
@@ -184,36 +184,39 @@

     # Populate GPU node properties
     cu_scratch = options.simds_per_cu * options.wfs_per_simd
-    node_prop = 'cpu_cores_count 0\n'                       + \
-                'simd_count 256\n'                          + \
-                'mem_banks_count 1\n'                       + \
-                'caches_count %s\n' % caches                + \
-                'io_links_count %s\n' % io_links            + \
-                'cpu_core_id_base 0\n'                      + \
-                'simd_id_base 2147487744\n'                 + \
-                'max_waves_per_simd 10\n'                   + \
-                'lds_size_in_kb 64\n'                       + \
-                'gds_size_in_kb 0\n'                        + \
-                'wave_front_size 64\n'                      + \
-                'array_count 4\n'                           + \
-                'simd_arrays_per_engine 1\n'                + \
-                'cu_per_simd_array 16\n'                    + \
-                'simd_per_cu 4\n'                           + \
-                'max_slots_scratch_cu %s\n' % cu_scratch    + \
-                'vendor_id 4098\n'                          + \
-                'device_id 26720\n'                         + \
-                'location_id 1024\n'                        + \
-                'drm_render_minor %s\n' % drm_num           + \
-                'hive_id 0\n'                               + \
-                'num_sdma_engines 2\n'                      + \
-                'num_sdma_xgmi_engines 0\n'                 + \
-                'max_engine_clk_fcompute 1500\n'            + \
-                'local_mem_size 17163091968\n'              + \
-                'fw_version 421\n'                          + \
-                'capability 238208\n'                       + \
-                'debug_prop 32768\n'                        + \
-                'sdma_fw_version 430\n'                     + \
-                'max_engine_clk_ccompute 3400\n'
+ node_prop = 'cpu_cores_count 0\n' + \ + 'simd_count %d\n' \ + % (options.num_compute_units * options.simds_per_cu) + \ + 'mem_banks_count 1\n' + \ + 'caches_count %s\n' % caches + \ + 'io_links_count %s\n' % io_links + \ + 'cpu_core_id_base 0\n' + \ + 'simd_id_base 2147487744\n' + \ + 'max_waves_per_simd %s\n' % options.wfs_per_simd + \ + 'lds_size_in_kb %d\n' % int(options.lds_size / 1024) + \ + 'gds_size_in_kb 0\n' + \ + 'wave_front_size %s\n'% options.wf_size + \ + 'array_count 4\n' + \ + 'simd_arrays_per_engine %s\n' % options.sa_per_complex + \ + 'cu_per_simd_array %s\n' % options.cu_per_sa + \ + 'simd_per_cu %s\n' % options.simds_per_cu + \ + 'max_slots_scratch_cu %s\n' % cu_scratch + \ + 'vendor_id 4098\n' + \ + 'device_id 26720\n' + \ + 'location_id 1024\n' + \ + 'drm_render_minor %s\n' % drm_num + \ + 'hive_id 0\n' + \ + 'num_sdma_engines 2\n' + \ + 'num_sdma_xgmi_engines 0\n' + \ + 'max_engine_clk_fcompute %s\n' \ + % int(toFrequency(options.gpu_clock) / 1e6) + \ + 'local_mem_size 17163091968\n' + \ + 'fw_version 421\n' + \ + 'capability 238208\n' + \ + 'debug_prop 32768\n' + \ + 'sdma_fw_version 430\n' + \ + 'max_engine_clk_ccompute %s\n' \
+                    % int(toFrequency(options.CPUClock) / 1e6)

     file_append((node_dir, 'properties'), node_prop)


--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/57309
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I76cd1d04fd00df2b66c9ecfae9b364f553f5e5e4
Gerrit-Change-Number: 57309
Gerrit-PatchSet: 1
Gerrit-Owner: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

Reply via email to