Matthew Poremba has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57411 )

Change subject: configs: Make VIPER memory MessageBuffers ordered
......................................................................

configs: Make VIPER memory MessageBuffers ordered

The VIPER configuration uses the MOESI_AMD_Base protocol's directory.
This protocol does not wait for memory ACKs. As a result, this can lead
to read requests being pulled out of the MessageBuffer between the
directory and DRAMCtrl before a write request to the same address. This
leads to inconsistent data. To fix this, make the MessageBuffers
ordered. Since these MessageBuffers are essentially just an interface
between SLICC and DRAMCtrl, and DRAMCtrl can reorder requests properly,
this should not cause any large impact on performance due to the
constraint.

Also remove the duplicate instantiation of these MessageBuffers.

Change-Id: I59653717cc79884e733af3958adfc14941703958
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57411
Reviewed-by: Matthew Poremba <matthew.pore...@amd.com>
Maintainer: Matthew Poremba <matthew.pore...@amd.com>
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M configs/ruby/GPU_VIPER.py
1 file changed, 29 insertions(+), 5 deletions(-)

Approvals:
  Matthew Poremba: Looks good to me, approved; Looks good to me, approved
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/configs/ruby/GPU_VIPER.py b/configs/ruby/GPU_VIPER.py
index f8a7386..c3e146b 100644
--- a/configs/ruby/GPU_VIPER.py
+++ b/configs/ruby/GPU_VIPER.py
@@ -443,8 +443,8 @@

         dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
         dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
-        dir_cntrl.requestToMemory = MessageBuffer()
-        dir_cntrl.responseFromMemory = MessageBuffer()
+        dir_cntrl.requestToMemory = MessageBuffer(ordered = True)
+        dir_cntrl.responseFromMemory = MessageBuffer(ordered = True)

         dir_cntrl.requestFromDMA = MessageBuffer(ordered=True)
         dir_cntrl.requestFromDMA.in_port = network.out_port
@@ -452,9 +452,6 @@
         dir_cntrl.responseToDMA = MessageBuffer()
         dir_cntrl.responseToDMA.out_port = network.in_port

-        dir_cntrl.requestToMemory = MessageBuffer()
-        dir_cntrl.responseFromMemory = MessageBuffer()
-
         exec("ruby_system.dir_cntrl%d = dir_cntrl" % i)
         dir_cntrl_nodes.append(dir_cntrl)


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I59653717cc79884e733af3958adfc14941703958
Gerrit-Change-Number: 57411
Gerrit-PatchSet: 5
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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