Matthew Poremba has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/57670 )
Change subject: dev-hsa: Update QCntxt readIndex in HW scheduler write
......................................................................
dev-hsa: Update QCntxt readIndex in HW scheduler write
The QCntxt is reused when a queue is unmapped and mapped again. This is
fairly common in GPU full system. If this is not done the readIndex on
the queue context is reset to 1, causing getCommandsFromHost to read
from the wrong slot which is typically an old dispatch packet or an
invalid packet. This causes simulation to stall as the incorrect
completion signal is eventually written.
Change-Id: I65541e559fe04f5eb44b936ca37e3f802262fe6a
---
M src/dev/hsa/hw_scheduler.cc
1 file changed, 21 insertions(+), 0 deletions(-)
diff --git a/src/dev/hsa/hw_scheduler.cc b/src/dev/hsa/hw_scheduler.cc
index 8798d42..d88e4f9 100644
--- a/src/dev/hsa/hw_scheduler.cc
+++ b/src/dev/hsa/hw_scheduler.cc
@@ -332,6 +332,11 @@
uint32_t al_idx = dbMap[db_addr];
// Modify the write pointer
activeList[al_idx].qDesc->writeIndex = doorbell_reg;
+ // If a queue is unmapped and remapped (common in full system) the
qDesc
+ // gets reused. Keep the readIndex up to date so that when the HSA
packet
+ // processor gets commands from host, the correct entry is read after
+ // remapping.
+ activeList[al_idx].qDesc->readIndex = doorbell_reg - 1;
DPRINTF(HSAPacketProcessor, "queue %d qDesc->writeIndex %d\n",
al_idx, activeList[al_idx].qDesc->writeIndex);
// If this queue is mapped, then start DMA to fetch the
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I65541e559fe04f5eb44b936ca37e3f802262fe6a
Gerrit-Change-Number: 57670
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-MessageType: newchange
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