Matthew Poremba has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/57531 )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
)Change subject: configs: Fix XBar assert with odd number of CPUs
......................................................................
configs: Fix XBar assert with odd number of CPUs
The CorePairs in MOESI_AMD_Base round up the number of CPUs when
creating CPU sequencers. If the CPU count is an odd number, this was
causing the Disjoint_VIPER config to connect a sequencer that does not
exist. As a result the crossbar was waiting for a range change from the
sequencer but it never arrived, causing an assert.
This patch fixes this by conditionally connecting CPU sequencers to the
PIO port only if the ID is less than the number of CPUs.
Change-Id: I2280c0048492d43528429a947a726871f1c23ca7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57531
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M configs/example/gpufs/Disjoint_VIPER.py
1 file changed, 27 insertions(+), 2 deletions(-)
Approvals:
Matt Sinclair: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/configs/example/gpufs/Disjoint_VIPER.py
b/configs/example/gpufs/Disjoint_VIPER.py
index 17729b0..8ddaeac 100644
--- a/configs/example/gpufs/Disjoint_VIPER.py
+++ b/configs/example/gpufs/Disjoint_VIPER.py
@@ -182,8 +182,11 @@
cp_sequencers[i].pio_request_port = piobus.cpu_side_ports
cp_sequencers[i].mem_request_port = piobus.cpu_side_ports
- # Note: only used in X86
- cp_sequencers[i].pio_response_port = piobus.mem_side_ports
+ # The CorePairs in MOESI_AMD_Base round up when constructing
+ # sequencers, but if the CPU does not exit there would be no
+ # sequencer to send a range change, leading to assert.
+ if i < options.num_cpus:
+ cp_sequencers[i].pio_response_port = piobus.mem_side_ports
# Setup ruby port. Both CPU and GPU are actually connected here.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2280c0048492d43528429a947a726871f1c23ca7
Gerrit-Change-Number: 57531
Gerrit-PatchSet: 18
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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