See <https://jenkins.gem5.org/job/weekly/48/display/redirect?page=changes>
Changes:
[matthew.poremba] util: Add dockerfile for building GPUFS application
[matthew.poremba] configs: Make vega10_kvm.py runnable
[yuhsingw] dev: Add a special reset interface to consolidate reset logic
[yuhsingw] fastmodel: Add CortexA76 model reset port
[yuhsingw] fastmodel: Add CortexR52 model reset port
[Bobby R. Bruce] tests: Add the 'vega_x86_tag' to testlib
[Bobby R. Bruce] learning-gem5,tests: Fix 'valid_isas' in learning gem5 part 3
[Bobby R. Bruce] tests,gpu-compute: Replace gcn3 tests with vega testlib tests
[Bobby R. Bruce] tests,gpu-compute,mem-ruby: Add GPU Ruby random test
[Bobby R. Bruce] stdlib: Fix race condition in creating of resource dir
[Jason Lowe-Power] python: Add error for creating abstact SimObjects
------------------------------------------
[...truncated 152.27 KB...]
[SO Param] m5.objects.HelloObject, HelloObject ->
X86/python/_m5/param_HelloObject.cc
[ENUMDECL] m5.objects.SMBios, Characteristic -> X86/enums/Characteristic.hh
[SO Param] m5.objects.I8237, I8237 -> X86/python/_m5/param_I8237.cc
[SO Param] m5.objects.I8259, I8259 -> X86/python/_m5/param_I8259.cc
[SO Param] m5.objects.GarnetLink, GarnetExtLink -> X86/params/GarnetExtLink.hh
[SO Param] m5.objects.Compressors, PerfectCompressor ->
X86/python/_m5/param_PerfectCompressor.cc
[SO Param] m5.objects.E820, X86E820Entry ->
X86/python/_m5/param_X86E820Entry.cc
[SO Param] m5.objects.Prefetcher, BasePrefetcher ->
X86/params/BasePrefetcher.hh
[SO Param] m5.objects.XBar, NoncoherentXBar -> X86/params/NoncoherentXBar.hh
[SO Param] m5.objects.BaseMMU, BaseMMU -> X86/params/BaseMMU.hh
[SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemBytes ->
X86/python/_m5/param_QemuFwCfgItemBytes.cc
[SO Param] m5.objects.BaseCPU, BaseCPU -> X86/python/_m5/param_BaseCPU.cc
[SO Param] m5.objects.X86FsWorkload, X86FsWorkload ->
X86/python/_m5/param_X86FsWorkload.cc
[ENUM STR] m5.objects.BaseTrafficGen, StreamGenType ->
X86/enums/StreamGenType.cc
[SO Param] m5.objects.Process, EmulatedDriver ->
X86/python/_m5/param_EmulatedDriver.cc
[SO Param] m5.objects.BranchPredictor, TAGE_SC_L -> X86/params/TAGE_SC_L.hh
[SO Param] m5.objects.NVMInterface, NVMInterface ->
X86/python/_m5/param_NVMInterface.cc
[SO Param] m5.objects.BasicLink, BasicIntLink ->
X86/python/_m5/param_BasicIntLink.cc
[SO Param] m5.objects.SimpleObject, SimpleObject ->
X86/python/_m5/param_SimpleObject.cc
[SO Param] m5.objects.ACPI, X86ACPIRSDT -> X86/params/X86ACPIRSDT.hh
[SO Param] m5.objects.MathExprPowerModel, MathExprPowerModel ->
X86/params/MathExprPowerModel.hh
[SO Param] m5.objects.Compressors, Base32Delta8 ->
X86/python/_m5/param_Base32Delta8.cc
[SO Param] m5.objects.CopyEngine, CopyEngine ->
X86/python/_m5/param_CopyEngine.cc
[SO Param] m5.objects.BranchPredictor, TAGE -> X86/params/TAGE.hh
[SO Param] m5.objects.BranchPredictor, MPP_LoopPredictor_8KB ->
X86/params/MPP_LoopPredictor_8KB.hh
[SO Param] m5.objects.TlmBridge, Gem5ToTlmBridge512 ->
X86/python/_m5/param_Gem5ToTlmBridge512.cc
[ENUM STR] m5.objects.System, MemoryMode -> X86/enums/MemoryMode.cc
[SO Param] m5.objects.StackDistProbe, StackDistProbe ->
X86/params/StackDistProbe.hh
[SO Param] m5.objects.Prefetcher, BOPPrefetcher ->
X86/python/_m5/param_BOPPrefetcher.cc
[SO Param] m5.objects.QoSTurnaround, QoSTurnaroundPolicy ->
X86/params/QoSTurnaroundPolicy.hh
[SO Param] m5.objects.GarnetSyntheticTraffic, GarnetSyntheticTraffic ->
X86/params/GarnetSyntheticTraffic.hh
[SO Param] m5.objects.TimingExpr, TimingExprLiteral ->
X86/python/_m5/param_TimingExprLiteral.cc
[SO Param] m5.objects.MemFootprintProbe, MemFootprintProbe ->
X86/params/MemFootprintProbe.hh
[SO Param] m5.objects.Device, DmaVirtDevice -> X86/params/DmaVirtDevice.hh
[SO Param] m5.objects.RubyDirectedTester, RubyDirectedTester ->
X86/params/RubyDirectedTester.hh
[SO Param] m5.objects.Compressors, RepeatedQwordsCompressor ->
X86/python/_m5/param_RepeatedQwordsCompressor.cc
[SO Param] m5.objects.DirectoryMemory, RubyDirectoryMemory ->
X86/params/RubyDirectoryMemory.hh
[SO Param] m5.objects.PowerModelState, PowerModelState ->
X86/python/_m5/param_PowerModelState.cc
[SO Param] m5.objects.BaseTLB, BaseTLB -> X86/params/BaseTLB.hh
[ENUMDECL] m5.objects.System, MemoryMode -> X86/enums/MemoryMode.hh
[SO Param] m5.objects.Compressors, ZeroCompressor ->
X86/python/_m5/param_ZeroCompressor.cc
[SO Param] m5.objects.Prefetcher, IndirectMemoryPrefetcher ->
X86/python/_m5/param_IndirectMemoryPrefetcher.cc
[SO Param] m5.objects.Bridge, Bridge -> X86/python/_m5/param_Bridge.cc
[SO Param] m5.objects.QoSTurnaround, QoSTurnaroundPolicyIdeal ->
X86/python/_m5/param_QoSTurnaroundPolicyIdeal.cc
[SO Param] m5.objects.Ethernet, EtherDevice ->
X86/python/_m5/param_EtherDevice.cc
[SO Param] m5.objects.IntelMP, X86IntelMPBusHierarchy ->
X86/params/X86IntelMPBusHierarchy.hh
[SO Param] m5.objects.GarnetNetwork, GarnetNetwork ->
X86/python/_m5/param_GarnetNetwork.cc
[SO Param] m5.objects.BranchPredictor, TAGE_SC_L_TAGE_8KB ->
X86/params/TAGE_SC_L_TAGE_8KB.hh
[SO Param] m5.objects.Compressors, BaseDictionaryCompressor ->
X86/python/_m5/param_BaseDictionaryCompressor.cc
[SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemFile ->
X86/python/_m5/param_QemuFwCfgItemFile.cc
[SO Param] m5.objects.Cache, BaseCache -> X86/params/BaseCache.hh
[SO Param] m5.objects.ThermalModel, ThermalNode -> X86/params/ThermalNode.hh
[SO Param] m5.objects.Sequencer, RubyPortProxy ->
X86/python/_m5/param_RubyPortProxy.cc
[SO Param] m5.objects.FUPool, FUPool -> X86/params/FUPool.hh
[SO Param] m5.objects.BranchPredictor, IndirectPredictor ->
X86/params/IndirectPredictor.hh
[SO Param] m5.objects.L1Cache_Controller, L1Cache_Controller ->
X86/python/_m5/param_L1Cache_Controller.cc
[SO Param] m5.objects.Terminal, Terminal -> X86/params/Terminal.hh
[ENUM STR] m5.objects.SMBios, ExtCharacteristic ->
X86/enums/ExtCharacteristic.cc
[SO Param] m5.objects.PciDevice, PciMemBar -> X86/params/PciMemBar.hh
[SO Param] m5.objects.X86TLB, X86TLB -> X86/python/_m5/param_X86TLB.cc
[SO Param] m5.objects.BranchPredictor, TAGE_SC_L_64KB_StatisticalCorrector ->
X86/params/TAGE_SC_L_64KB_StatisticalCorrector.hh
[SO Param] m5.objects.PciHost, GenericPciHost ->
X86/python/_m5/param_GenericPciHost.cc
[SO Param] m5.objects.BaseMinorCPU, MinorOpClassSet ->
X86/python/_m5/param_MinorOpClassSet.cc
[SO Param] m5.objects.Pc, Pc -> X86/params/Pc.hh
[SO Param] m5.objects.Vnc, VncServer -> X86/params/VncServer.hh
[SO Param] m5.objects.Workload, KernelWorkload ->
X86/python/_m5/param_KernelWorkload.cc
[SO Param] m5.objects.BaseTLB, BaseTLB -> X86/python/_m5/param_BaseTLB.cc
[SO Param] m5.objects.BasicLink, BasicExtLink -> X86/params/BasicExtLink.hh
[SO Param] m5.objects.ClockDomain, DerivedClockDomain ->
X86/python/_m5/param_DerivedClockDomain.cc
[SO Param] m5.objects.Prefetcher, StridePrefetcherHashedSetAssociative ->
X86/params/StridePrefetcherHashedSetAssociative.hh
[SO Param] m5.objects.MemInterface, MemInterface -> X86/params/MemInterface.hh
[SO Param] m5.objects.GarnetLink, NetworkBridge ->
X86/python/_m5/param_NetworkBridge.cc
[SO Param] m5.objects.Ethernet, EtherDevBase -> X86/params/EtherDevBase.hh
[SO Param] m5.objects.QoSPolicy, QoSPropFairPolicy ->
X86/params/QoSPropFairPolicy.hh
[SO Param] m5.objects.CheckerCPU, CheckerCPU ->
X86/python/_m5/param_CheckerCPU.cc
[SO Param] m5.objects.ReplacementPolicies, MRURP -> X86/params/MRURP.hh
[SO Param] m5.objects.BranchPredictor, LTAGE -> X86/python/_m5/param_LTAGE.cc
[SO Param] m5.objects.RubyCache, RubyCache -> X86/python/_m5/param_RubyCache.cc
[SO Param] m5.objects.PciDevice, PciMemUpperBar ->
X86/python/_m5/param_PciMemUpperBar.cc
[ENUMDECL] m5.objects.PowerState, PwrState -> X86/enums/PwrState.hh
[ENUMDECL] m5.objects.Ide, IdeID -> X86/enums/IdeID.hh
[SO Param] m5.objects.IndexingPolicies, SkewedAssociative ->
X86/params/SkewedAssociative.hh
[SO Param] m5.objects.AddrMapper, RangeAddrMapper ->
X86/params/RangeAddrMapper.hh
[SO Param] m5.objects.AbstractMemory, AbstractMemory ->
X86/python/_m5/param_AbstractMemory.cc
[SO Param] m5.objects.BranchPredictor, LocalBP ->
X86/python/_m5/param_LocalBP.cc
[SO Param] m5.objects.SystemC, SystemC_ScObject ->
X86/python/_m5/param_SystemC_ScObject.cc
[SO Param] m5.objects.X86FsWorkload, X86BareMetalWorkload ->
X86/python/_m5/param_X86BareMetalWorkload.cc
[SO Param] m5.objects.X86NativeTrace, X86NativeTrace ->
X86/params/X86NativeTrace.hh
[SO Param] m5.objects.ReplacementPolicies, TreePLRURP ->
X86/python/_m5/param_TreePLRURP.cc
[ENUMDECL] m5.objects.PowerModel, PMType -> X86/enums/PMType.hh
[SO Param] m5.objects.Process, EmulatedDriver -> X86/params/EmulatedDriver.hh
[ENUMDECL] m5.objects.DRAMInterface, PageManage -> X86/enums/PageManage.hh
[SO Param] m5.objects.X86Ide, X86IdeController ->
X86/params/X86IdeController.hh
[SO Param] m5.objects.Prefetcher, SignaturePathPrefetcher ->
X86/python/_m5/param_SignaturePathPrefetcher.cc
[SO Param] m5.objects.IndexingPolicies, SetAssociative ->
X86/params/SetAssociative.hh
[SO Param] m5.objects.BaseO3CPU, BaseO3CPU -> X86/params/BaseO3CPU.hh
[SO Param] m5.objects.ClockedObject, ClockedObject ->
X86/python/_m5/param_ClockedObject.cc
[SO Param] m5.objects.Directory_Controller, Directory_Controller ->
X86/python/_m5/param_Directory_Controller.cc
[SO Param] m5.objects.Sequencer, DMASequencer ->
X86/python/_m5/param_DMASequencer.cc
[SO Param] m5.objects.OutgoingRequestBridge, OutgoingRequestBridge ->
X86/params/OutgoingRequestBridge.hh
[SO Param] m5.objects.Prefetcher, SignaturePathPrefetcherV2 ->
X86/params/SignaturePathPrefetcherV2.hh
[SO Param] m5.objects.ReplacementPolicies, SecondChanceRP ->
X86/python/_m5/param_SecondChanceRP.cc
[SO Param] m5.objects.PyTrafficGen, PyTrafficGen ->
X86/python/_m5/param_PyTrafficGen.cc
[SO Param] m5.objects.TlmBridge, TlmToGem5Bridge256 ->
X86/params/TlmToGem5Bridge256.hh
[SO Param] m5.objects.VirtIO, VirtIODeviceBase ->
X86/python/_m5/param_VirtIODeviceBase.cc
[SO Param] m5.objects.TickedObject, TickedObject ->
X86/python/_m5/param_TickedObject.cc
[SO Param] m5.objects.Ethernet, NSGigE -> X86/python/_m5/param_NSGigE.cc
[SO Param] m5.objects.BaseO3Checker, BaseO3Checker ->
X86/params/BaseO3Checker.hh
[SO Param] m5.objects.Prefetcher, PIFPrefetcher ->
X86/python/_m5/param_PIFPrefetcher.cc
[SO Param] m5.objects.Ethernet, Sinic -> X86/python/_m5/param_Sinic.cc
[SO Param] m5.objects.TimingExpr, TimingExprSrcReg ->
X86/python/_m5/param_TimingExprSrcReg.cc
[SO Param] m5.objects.Tags, BaseSetAssoc -> X86/params/BaseSetAssoc.hh
[SO Param] m5.objects.BaseMinorCPU, BaseMinorCPU ->
X86/python/_m5/param_BaseMinorCPU.cc
[SO Param] m5.objects.PowerState, PowerState -> X86/params/PowerState.hh
[SO Param] m5.objects.VirtIO9P, VirtIO9PProxy ->
X86/python/_m5/param_VirtIO9PProxy.cc
[SO Param] m5.objects.InstDecoder, InstDecoder ->
X86/python/_m5/param_InstDecoder.cc
[SO Param] m5.objects.SimpleObject, SimpleObject -> X86/params/SimpleObject.hh
[ENUM STR] m5.objects.GarnetLink, CDCType -> X86/enums/CDCType.cc
[ENUMDECL] m5.objects.BaseMinorCPU, ThreadPolicy -> X86/enums/ThreadPolicy.hh
[SO Param] m5.objects.VirtIO, VirtIODummyDevice ->
X86/python/_m5/param_VirtIODummyDevice.cc
[SO Param] m5.objects.PciDevice, PciLegacyIoBar -> X86/params/PciLegacyIoBar.hh
[SO Param] m5.objects.Device, PioDevice -> X86/python/_m5/param_PioDevice.cc
[SO Param] m5.objects.Directory_Controller, Directory_Controller ->
X86/params/Directory_Controller.hh
[SO Param] m5.objects.PS2, PS2Mouse -> X86/python/_m5/param_PS2Mouse.cc
[SO Param] m5.objects.BaseKvmCPU, BaseKvmCPU -> X86/params/BaseKvmCPU.hh
[SO Param] m5.objects.Prefetcher, QueuedPrefetcher ->
X86/params/QueuedPrefetcher.hh
[ENUM STR] m5.objects.Graphics, ImageFormat -> X86/enums/ImageFormat.cc
[SO Param] m5.objects.ReplacementPolicies, SecondChanceRP ->
X86/params/SecondChanceRP.hh
[SO Param] m5.objects.BranchPredictor, LocalBP -> X86/params/LocalBP.hh
[SO Param] m5.objects.IntelMP, X86IntelMPCompatAddrSpaceMod ->
X86/python/_m5/param_X86IntelMPCompatAddrSpaceMod.cc
[ENUMDECL] m5.objects.BaseTrafficGen, StreamGenType ->
X86/enums/StreamGenType.hh
[SO Param] m5.objects.MemDelay, MemDelay -> X86/params/MemDelay.hh
[SO Param] m5.objects.Workload, SEWorkload ->
X86/python/_m5/param_SEWorkload.cc
[SO Param] m5.objects.QoSMemSinkInterface, QoSMemSinkInterface ->
X86/python/_m5/param_QoSMemSinkInterface.cc
[SO Param] m5.objects.IndexingPolicies, SkewedAssociative ->
X86/python/_m5/param_SkewedAssociative.cc
[SO Param] m5.objects.IndexingPolicies, BaseIndexingPolicy ->
X86/python/_m5/param_BaseIndexingPolicy.cc
[SO Param] m5.objects.BranchPredictor, TAGE_SC_L_LoopPredictor ->
X86/params/TAGE_SC_L_LoopPredictor.hh
[SO Param] m5.objects.TlmBridge, TlmToGem5Bridge64 ->
X86/python/_m5/param_TlmToGem5Bridge64.cc
[SO Param] m5.objects.ClockedObject, ClockedObject ->
X86/params/ClockedObject.hh
[SO Param] m5.objects.Device, PioDevice -> X86/params/PioDevice.hh
[SO Param] m5.objects.TlmBridge, Gem5ToTlmBridgeBase ->
X86/python/_m5/param_Gem5ToTlmBridgeBase.cc
[SO Param] m5.objects.I8042, I8042 -> X86/python/_m5/param_I8042.cc
[SO Param] m5.objects.Prefetcher, BOPPrefetcher -> X86/params/BOPPrefetcher.hh
[SO Param] m5.objects.PS2, PS2Mouse -> X86/params/PS2Mouse.hh
[SO Param] m5.objects.BranchPredictor, MPP_StatisticalCorrector_8KB ->
X86/python/_m5/param_MPP_StatisticalCorrector_8KB.cc
[SO Param] m5.objects.X86Ide, X86IdeController ->
X86/python/_m5/param_X86IdeController.cc
[SO Param] m5.objects.FuncUnit, FUDesc -> X86/python/_m5/param_FUDesc.cc
[SO Param] m5.objects.VirtIO, VirtIODeviceBase ->
X86/params/VirtIODeviceBase.hh
[SO Param] m5.objects.Sequencer, RubyPortProxy -> X86/params/RubyPortProxy.hh
[SO Param] m5.objects.TrafficGen, TrafficGen -> X86/params/TrafficGen.hh
[ENUMDECL] m5.objects.BaseO3CPU, CommitPolicy -> X86/enums/CommitPolicy.hh
[SO Param] m5.objects.CPUTracers, ExeTracer -> X86/params/ExeTracer.hh
[SO Param] m5.objects.Cmos, Cmos -> X86/params/Cmos.hh
[SO Param] m5.objects.BaseMinorCPU, MinorFUTiming ->
X86/params/MinorFUTiming.hh
[SO Param] m5.objects.System, System -> X86/python/_m5/param_System.cc
[SO Param] m5.objects.Prefetcher, MultiPrefetcher ->
X86/python/_m5/param_MultiPrefetcher.cc
[SO Param] m5.objects.SimPoint, SimPoint -> X86/python/_m5/param_SimPoint.cc
[SO Param] m5.objects.TlmBridge, Gem5ToTlmBridge128 ->
X86/params/Gem5ToTlmBridge128.hh
[SO Param] m5.objects.IntelMP, X86IntelMPBaseConfigEntry ->
X86/python/_m5/param_X86IntelMPBaseConfigEntry.cc
[SO Param] m5.objects.SystemC, SystemC_Kernel -> X86/params/SystemC_Kernel.hh
[SO Param] m5.objects.TlmBridge, Gem5ToTlmBridgeBase ->
X86/params/Gem5ToTlmBridgeBase.hh
[SO Param] m5.objects.X86MMU, X86MMU -> X86/params/X86MMU.hh
[SO Param] m5.objects.XBar, NoncoherentXBar ->
X86/python/_m5/param_NoncoherentXBar.cc
[SO Param] m5.objects.BranchPredictor, MPP_StatisticalCorrector_64KB ->
X86/python/_m5/param_MPP_StatisticalCorrector_64KB.cc
[SO Param] m5.objects.BranchPredictor, MPP_TAGE_8KB ->
X86/python/_m5/param_MPP_TAGE_8KB.cc
[SO Param] m5.objects.BaseSimpleCPU, BaseSimpleCPU ->
X86/params/BaseSimpleCPU.hh
[SO Param] m5.objects.DummyChecker, DummyChecker ->
X86/python/_m5/param_DummyChecker.cc
[SO Param] m5.objects.TrafficGen, TrafficGen ->
X86/python/_m5/param_TrafficGen.cc
[SO Param] m5.objects.RubyDirectedTester, SeriesRequestGenerator ->
X86/python/_m5/param_SeriesRequestGenerator.cc
[SO Param] m5.objects.Ethernet, EtherDevice -> X86/params/EtherDevice.hh
[SO Param] m5.objects.ACPI, X86ACPIMadtLAPIC ->
X86/python/_m5/param_X86ACPIMadtLAPIC.cc
[SO Param] m5.objects.TraceCPU, TraceCPU -> X86/python/_m5/param_TraceCPU.cc
[SO Param] m5.objects.ReplacementPolicies, BaseReplacementPolicy ->
X86/params/BaseReplacementPolicy.hh
[SO Param] m5.objects.Workload, Workload -> X86/python/_m5/param_Workload.cc
[SO Param] m5.objects.Compressors, BaseCacheCompressor ->
X86/params/BaseCacheCompressor.hh
[SO Param] m5.objects.ReplacementPolicies, SHiPPCRP ->
X86/python/_m5/param_SHiPPCRP.cc
[SO Param] m5.objects.SystemC, SystemC_Kernel ->
X86/python/_m5/param_SystemC_Kernel.cc
[SO Param] m5.objects.QemuFwCfg, QemuFwCfgItem -> X86/params/QemuFwCfgItem.hh
[SO Param] m5.objects.PowerDomain, PowerDomain -> X86/params/PowerDomain.hh
[SO Param] m5.objects.SimpleLink, SimpleExtLink ->
X86/python/_m5/param_SimpleExtLink.cc
[SO Param] m5.objects.TimingExpr, TimingExprRef ->
X86/python/_m5/param_TimingExprRef.cc
[SO Param] m5.objects.Cache, NoncoherentCache -> X86/params/NoncoherentCache.hh
[SO Param] m5.objects.XBar, CoherentXBar ->
X86/python/_m5/param_CoherentXBar.cc
[SO Param] m5.objects.BaseTimingSimpleCPU, BaseTimingSimpleCPU ->
X86/python/_m5/param_BaseTimingSimpleCPU.cc
[SO Param] m5.objects.QoSMemSinkCtrl, QoSMemSinkCtrl ->
X86/python/_m5/param_QoSMemSinkCtrl.cc
[SO Param] m5.objects.Platform, Platform -> X86/params/Platform.hh
[ CXX] X86/base/date.cc -> .o
[ LINK] -> X86/gem5.opt
scons: done building targets.
*** Summary of Warnings ***
Warning: Deprecated namespaces are not supported by this compiler.
Please make sure to check the mailing list for deprecation
announcements.
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outnni3fyg7 -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu atomic --num-cpus 1 --mem-system classic --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outqb5ynj1q -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 2 --mem-system classic --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outd6659jxp -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu atomic --num-cpus 2 --mem-system classic --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outqxodlhsr -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 4 --mem-system classic --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
atomic-cpu_1-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
atomic-cpu_1-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Suite:
timing-cpu_2-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outcksquyga -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 1 --mem-system classic --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Case:
timing-cpu_2-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Suite:
atomic-cpu_2-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
atomic-cpu_2-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Suite:
timing-cpu_4-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
timing-cpu_4-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Suite:
timing-cpu_1-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
timing-cpu_1-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Test:
atomic-cpu_1-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Logging call to command: /nobackup/jenkins/workspace/weekly/build/X86/gem5.opt
-d /tmp/gem5out53fdgokh -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 1 --mem-system mesi_two_level --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
timing-cpu_1-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Starting Test Case:
timing-cpu_1-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Test:
atomic-cpu_2-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Logging call to command: /nobackup/jenkins/workspace/weekly/build/X86/gem5.opt
-d /tmp/gem5outhy3xkj9i -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 2 --mem-system mesi_two_level --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
timing-cpu_2-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Starting Test Case:
timing-cpu_2-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Test:
timing-cpu_1-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Logging call to command: /nobackup/jenkins/workspace/weekly/build/X86/gem5.opt
-d /tmp/gem5outa0bh_jcp -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 4 --mem-system mesi_two_level --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
timing-cpu_4-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Starting Test Case:
timing-cpu_4-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Test:
timing-cpu_2-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Logging call to command: /nobackup/jenkins/workspace/weekly/build/X86/gem5.opt
-d /tmp/gem5outez31n86c -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu timing --num-cpus 8 --mem-system mesi_two_level --dram-class
DualChannelDDR4_2400 --boot-type systemd --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
timing-cpu_8-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Starting Test Case:
timing-cpu_8-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Test:
timing-cpu_4-cores_classic_DualChannelDDR4_2400_systemd_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5out0yw8his4 -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu o3 --num-cpus 1 --mem-system classic --dram-class DualChannelDDR4_2400
--boot-type init --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
o3-cpu_1-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
o3-cpu_1-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Test:
timing-cpu_2-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Failed
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outn7m4j86a -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu o3 --num-cpus 2 --mem-system classic --dram-class DualChannelDDR4_2400
--boot-type init --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
o3-cpu_2-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
o3-cpu_2-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Test:
o3-cpu_1-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outo8znn3ir -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu o3 --num-cpus 4 --mem-system classic --dram-class DualChannelDDR4_2400
--boot-type init --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
o3-cpu_4-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
o3-cpu_4-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Test:
timing-cpu_1-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Passed
Logging call to command:
/nobackup/jenkins/workspace/weekly/build/VEGA_X86/gem5.opt -d
/tmp/gem5outvg3ky7l_ -re --silent-redirect
/nobackup/jenkins/workspace/weekly/tests/gem5/configs/x86_boot_exit_run.py
--cpu o3 --num-cpus 8 --mem-system classic --dram-class DualChannelDDR4_2400
--boot-type init --resource-directory
/nobackup/jenkins/workspace/weekly/tests/gem5/resources
Starting Test Suite:
o3-cpu_8-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Starting Test Case:
o3-cpu_8-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Test:
timing-cpu_4-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Passed
Test:
timing-cpu_8-cores_mesi_two_level_DualChannelDDR4_2400_systemd_x86-boot-test-X86-x86_64-opt
Passed
Test:
o3-cpu_2-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Generating LALR tables
Test:
o3-cpu_4-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Passed
Test:
o3-cpu_8-cores_classic_DualChannelDDR4_2400_init_x86-boot-test-VEGA_X86-x86_64-opt
Passed
============== Results: 12 Passed, 1 Failed in 3.3e+04 seconds ================
Build step 'Execute shell' marked build as failure
Archiving artifacts
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org
