Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/63892?usp=email )
Change subject: arch-arm: Allow TarmacTracer to dump trace to a file
......................................................................
arch-arm: Allow TarmacTracer to dump trace to a file
This patch is adding an outfile parameter to the TarmacTracer
This has 3 options:
1) stdoutput = dump to standard output (default behaviour)
2) stderror = dump to standard error
3) file = dump to a file. As there is one tracer per CPU,
this means every CPU will dump its trace to a different file,
named after the tracer name (e.g. cpu0.tracer, cpu1.tracer)
It is still possible to redirect to a file with option 1 and 2
thanks to common bash redirection. What the third option is
really buying us is the capability to dump CPU traces on
separate files
Change-Id: Icd2bcc721f8598d494c9efabdf5e092666ebdece
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
---
M src/arch/arm/tracers/SConscript
M src/arch/arm/tracers/TarmacTrace.py
M src/arch/arm/tracers/tarmac_tracer.cc
M src/arch/arm/tracers/tarmac_tracer.hh
4 files changed, 76 insertions(+), 4 deletions(-)
diff --git a/src/arch/arm/tracers/SConscript
b/src/arch/arm/tracers/SConscript
index a509b22..15945a4 100644
--- a/src/arch/arm/tracers/SConscript
+++ b/src/arch/arm/tracers/SConscript
@@ -36,7 +36,7 @@
Import('*')
SimObject('TarmacTrace.py', sim_objects=['TarmacParser', 'TarmacTracer'],
- tags='arm isa')
+ enums=['TarmacDump'], tags='arm isa')
Source('tarmac_base.cc', tags='arm isa')
Source('tarmac_parser.cc', tags='arm isa')
Source('tarmac_tracer.cc', tags='arm isa')
diff --git a/src/arch/arm/tracers/TarmacTrace.py
b/src/arch/arm/tracers/TarmacTrace.py
index 0e87ec9..82c447a 100644
--- a/src/arch/arm/tracers/TarmacTrace.py
+++ b/src/arch/arm/tracers/TarmacTrace.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2018 ARM Limited
+# Copyright (c) 2018, 2022 Arm Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -67,6 +67,10 @@
)
+class TarmacDump(ScopedEnum):
+ vals = ["stdoutput", "stderror", "file"]
+
+
class TarmacTracer(InstTracer):
type = "TarmacTracer"
cxx_class = "gem5::trace::TarmacTracer"
@@ -79,3 +83,13 @@
end_tick = Param.Tick(
MaxTick, "tracing ends when the tick time gets this value"
)
+ outfile = Param.TarmacDump(
+ "stdoutput",
+ "Selects where the tracer is dumping its output"
+ "Current options are:"
+ "1) stdoutput = dump to standard output"
+ "2) stderror = dump to standard error"
+ "3) file = dump to a file. As there is one tracer per CPU,"
+ "this means every CPU will dump its trace to a different file,"
+ "name after the tracer name (e.g. cpu0.tracer, cpu1.tracer)",
+ )
diff --git a/src/arch/arm/tracers/tarmac_tracer.cc
b/src/arch/arm/tracers/tarmac_tracer.cc
index 15f6abc..aa454f7 100644
--- a/src/arch/arm/tracers/tarmac_tracer.cc
+++ b/src/arch/arm/tracers/tarmac_tracer.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018 ARM Limited
+ * Copyright (c) 2017-2018, 2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -40,8 +40,11 @@
#include <string>
#include "arch/arm/system.hh"
+#include "base/output.hh"
#include "cpu/base.hh"
+#include "enums/TarmacDump.hh"
+
namespace gem5
{
@@ -54,8 +57,28 @@
return "cpu" + std::to_string(id);
}
+namespace {
+
+OutputStream *
+tarmacDump(const TarmacTracerParams &p)
+{
+ switch (p.outfile) {
+ case TarmacDump::stdoutput:
+ return simout.findOrCreate("stdout");
+ case TarmacDump::stderror:
+ return simout.findOrCreate("stderr");
+ case TarmacDump::file:
+ return simout.findOrCreate(p.name);
+ default:
+ panic("Invalid option\n");
+ }
+}
+
+}
+
TarmacTracer::TarmacTracer(const Params &p)
: InstTracer(p),
+ outstream(tarmacDump(p)),
startTick(p.start_tick),
endTick(p.end_tick)
{
@@ -95,5 +118,11 @@
}
}
+std::ostream&
+TarmacTracer::output()
+{
+ return *(outstream->stream());
+}
+
} // namespace trace
} // namespace gem5
diff --git a/src/arch/arm/tracers/tarmac_tracer.hh
b/src/arch/arm/tracers/tarmac_tracer.hh
index 7e7b409..f8c7b5c 100644
--- a/src/arch/arm/tracers/tarmac_tracer.hh
+++ b/src/arch/arm/tracers/tarmac_tracer.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018 ARM Limited
+ * Copyright (c) 2017-2018, 2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -54,6 +54,7 @@
{
class ThreadContext;
+class OutputStream;
namespace trace {
@@ -104,12 +105,16 @@
const StaticInstPtr staticInst, const PCStateBase &pc,
const StaticInstPtr macroStaticInst=nullptr) override;
+ std::ostream& output();
+
protected:
typedef std::unique_ptr<Printable> PEntryPtr;
typedef TarmacTracerRecord::InstPtr InstPtr;
typedef TarmacTracerRecord::MemPtr MemPtr;
typedef TarmacTracerRecord::RegPtr RegPtr;
+ OutputStream *outstream;
+
/**
* startTick and endTick allow to trace a specific window of ticks
* rather than the entire CPU execution.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icd2bcc721f8598d494c9efabdf5e092666ebdece
Gerrit-Change-Number: 63892
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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