Matthew Poremba has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/64191?usp=email )

Change subject: gpu-compute: Add missing initial reg state in WF
......................................................................

gpu-compute: Add missing initial reg state in WF

There are two initial scalar register fields that are not initialized in
the wavefront when a task is dispatch. This changeset adds the missing
DispatchId and PrivateSegSize fields. These fields are typically used
when an application is compiled with debug support and are typically not
used in the applications in gem5's test suite.

Change-Id: I5b5fa75e4badfd9ba7588e4cd485ebf75fd5d627
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64191
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/gpu-compute/wavefront.cc
1 file changed, 43 insertions(+), 0 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/gpu-compute/wavefront.cc b/src/gpu-compute/wavefront.cc
index 8e1a066..7e4b36f 100644
--- a/src/gpu-compute/wavefront.cc
+++ b/src/gpu-compute/wavefront.cc
@@ -252,6 +252,18 @@

                 ++regInitIdx;
                 break;
+              case DispatchId:
+                physSgprIdx
+ = computeUnit->registerManager->mapSgpr(this, regInitIdx);
+                computeUnit->srf[simdId]->write(physSgprIdx,
+                        task->dispatchId());
+                ++regInitIdx;
+                DPRINTF(GPUInitAbi, "CU%d: WF[%d][%d]: wave[%d] "
+                        "Setting DispatchId: s[%d] = %x\n",
+                        computeUnit->cu_id, simdId,
+                        wfSlotId, wfDynId, physSgprIdx,
+                        task->dispatchId());
+                break;
               case FlatScratchInit:
                 physSgprIdx
= computeUnit->registerManager->mapSgpr(this, regInitIdx);
@@ -309,6 +321,18 @@
                        hidden_priv_base,
                        task->amdQueue.scratch_backing_memory_location);
                 break;
+              case PrivateSegSize:
+                physSgprIdx
+ = computeUnit->registerManager->mapSgpr(this, regInitIdx);
+                computeUnit->srf[simdId]->write(physSgprIdx,
+                        task->privMemPerItem());
+                ++regInitIdx;
+                DPRINTF(GPUInitAbi, "CU%d: WF[%d][%d]: wave[%d] "
+                        "Setting private segment size: s[%d] = %x\n",
+                        computeUnit->cu_id, simdId,
+                        wfSlotId, wfDynId, physSgprIdx,
+                        task->privMemPerItem());
+                break;
               case GridWorkgroupCountX:
                 physSgprIdx =
computeUnit->registerManager->mapSgpr(this, regInitIdx);

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/64191?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5b5fa75e4badfd9ba7588e4cd485ebf75fd5d627
Gerrit-Change-Number: 64191
Gerrit-PatchSet: 3
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list -- gem5-dev@gem5.org
To unsubscribe send an email to gem5-dev-le...@gem5.org

Reply via email to