See <https://jenkins.gem5.org/job/nightly/389/display/redirect?page=changes>
Changes: [Jason Lowe-Power] python: Update -c to work like normal python [Jason Lowe-Power] stdlib: Update TestBoard to work with Simulator [Jason Lowe-Power] configs: Add example memory traffic runscript ------------------------------------------ [...truncated 1.41 MB...] [ CXX] ARM/sim/SubSystem.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/hbm.py.cc -> .o [ CXX] ARM/python/gem5/components/memory/hbm.py.cc -> .pyo [ CXX] ARM/mem/CfiMemory.py.cc -> .pyo [ CXX] ARM/debug/Semihosting.cc -> .o [ CXX] ARM/debug/GDBSend.cc -> .o [ CXX] ARM/python/m5/trace.py.cc -> .o [ CXX] ARM/python/m5/trace.py.cc -> .pyo [ CXX] ARM/mem/cache/Cache.py.cc -> .pyo [ CXX] ARM/debug/CCRegs.cc -> .o [ CXX] ARM/mem/ruby/system/Sequencer.py.cc -> .pyo [ CXX] ARM/arch/generic/BaseISA.py.cc -> .pyo [ CXX] ARM/arch/arm/ArmMMU.py.cc -> .o [ CXX] ARM/arch/arm/ArmMMU.py.cc -> .pyo [ CXX] ARM/dev/arm/FlashDevice.py.cc -> .pyo [ CXX] ARM/python/gem5/simulate/exit_event.py.cc -> .pyo [ CXX] ARM/python/gem5/simulate/exit_event.py.cc -> .o [ CXX] ARM/mem/SharedMemoryServer.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/linear_generator_core.py.cc -> .o [ CXX] ARM/python/gem5/components/processors/linear_generator_core.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/dramsim_3.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/dramsim_3.py.cc -> .o [ CXX] ARM/dev/storage/Ide.py.cc -> .pyo [ CXX] ARM/arch/arm/ArmDecoder.py.cc -> .o [ CXX] ARM/arch/arm/ArmDecoder.py.cc -> .pyo [ CXX] ARM/python/gem5/components/boards/simple_board.py.cc -> .pyo [ CXX] ARM/python/gem5/components/boards/simple_board.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/classic/caches/l2cache.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/classic/caches/l2cache.py.cc -> .pyo [ CXX] ARM/python/gem5/components/boards/abstract_system_board.py.cc -> .pyo [ CXX] ARM/python/gem5/components/boards/abstract_system_board.py.cc -> .o [ CXX] ARM/python/m5/util/terminal.py.cc -> .pyo [ CXX] ARM/python/m5/util/terminal.py.cc -> .o [ CXX] ARM/arch/arm/ArmSystem.py.cc -> .o [ CXX] ARM/arch/arm/ArmSystem.py.cc -> .pyo [ CXX] ARM/python/m5/defines.py.cc -> .pyo [ CXX] ARM/dev/Platform.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/abstract_directory.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/abstract_directory.py.cc -> .pyo [ CXX] ARM/python/gem5/prebuilt/__init__.py.cc -> .o [ CXX] ARM/python/gem5/prebuilt/__init__.py.cc -> .pyo [ CXX] ARM/learning_gem5/part2/HelloObject.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/dram_interfaces/hbm.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/dram_interfaces/hbm.py.cc -> .o [ CXX] ARM/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py.cc -> .o [ CXX] ARM/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py.cc -> .pyo [ CXX] ARM/mem/probes/BaseMemProbe.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/gups_generator_ep.py.cc -> .o [ CXX] ARM/python/gem5/components/processors/gups_generator_ep.py.cc -> .pyo [ CXX] ARM/debug/IntRegs.cc -> .o [ CXX] ARM/debug/Registers.cc -> .o [ CXX] ARM/mem/ruby/network/garnet/GarnetLink.py.cc -> .pyo [ CXX] ARM/dev/qemu/QemuFwCfg.py.cc -> .pyo [ CXX] ARM/python/m5/stats/__init__.py.cc -> .pyo [ CXX] ARM/python/m5/stats/__init__.py.cc -> .o [ CXX] ARM/debug/VecPredRegs.cc -> .o [ CXX] ARM/python/gem5/utils/requires.py.cc -> .pyo [ CXX] ARM/python/gem5/utils/requires.py.cc -> .o [ CXX] ARM/mem/qos/QoSMemSinkInterface.py.cc -> .pyo [ CXX] ARM/cpu/simple/probes/SimPoint.py.cc -> .pyo [ CXX] ARM/python/m5/util/multidict.py.cc -> .o [ CXX] ARM/python/m5/util/multidict.py.cc -> .pyo [ CXX] ARM/mem/cache/tags/indexing_policies/IndexingPolicies.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/chi/__init__.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/chi/__init__.py.cc -> .o [ CXX] ARM/dev/pci/CopyEngine.py.cc -> .pyo [ CXX] ARM/dev/arm/EnergyCtrl.py.cc -> .pyo [ CXX] ARM/base/vnc/Vnc.py.cc -> .pyo [ CXX] ARM/base/vnc/Vnc.py.cc -> .o [ CXX] ARM/python/m5/ext/pystats/jsonserializable.py.cc -> .pyo [ CXX] ARM/python/m5/ext/pystats/jsonserializable.py.cc -> .o [ CXX] ARM/debug/GDBAcc.cc -> .o [ CXX] ARM/debug/GDBAll.cc -> .o [ CXX] ARM/mem/ruby/network/MessageBuffer.py.cc -> .pyo [ CXX] ARM/python/m5/ticks.py.cc -> .pyo [ CXX] ARM/python/m5/ticks.py.cc -> .o [ CXX] ARM/sim/VoltageDomain.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/dram_interfaces/ddr3.py.cc -> .o [ CXX] ARM/python/gem5/components/memory/dram_interfaces/ddr3.py.cc -> .pyo [ CXX] ARM/learning_gem5/part2/SimpleObject.py.cc -> .pyo [ CXX] ARM/sim/Process.py.cc -> .pyo [ CXX] ARM/python/gem5/resources/md5_utils.py.cc -> .pyo [ CXX] ARM/python/gem5/resources/md5_utils.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l1_cache.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l1_cache.py.cc -> .o [ CXX] ARM/python/gem5/components/processors/simple_switchable_processor.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/simple_switchable_processor.py.cc -> .o [ CXX] ARM/mem/ruby/structures/WireBuffer.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/classic/caches/__init__.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/classic/caches/__init__.py.cc -> .o [ CXX] ARM/mem/MemChecker.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/abstract_generator_core.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/abstract_generator_core.py.cc -> .o [ CXX] ARM/debug/SQL.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/__init__.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/__init__.py.cc -> .pyo [ CXX] ARM/sim/DVFSHandler.py.cc -> .pyo [ CXX] ARM/python/gem5/prebuilt/riscvmatched/riscvmatched_cache.py.cc -> .o [ CXX] ARM/python/gem5/prebuilt/riscvmatched/riscvmatched_cache.py.cc -> .pyo [ CXX] ARM/mem/ruby/network/garnet/GarnetNetwork.py.cc -> .pyo [ CXX] ARM/mem/XBar.py.cc -> .pyo [ CXX] ARM/python/gem5/utils/filelock.py.cc -> .o [ CXX] ARM/python/gem5/utils/filelock.py.cc -> .pyo [ CXX] ARM/dev/virtio/VirtIOBlock.py.cc -> .pyo [ CXX] ARM/mem/ruby/network/BasicRouter.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/abstract_cache_hierarchy.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/abstract_cache_hierarchy.py.cc -> .o [ CXX] ARM/python/m5/options.py.cc -> .pyo [ CXX] ARM/python/m5/options.py.cc -> .o [ CXX] ARM/dev/virtio/VirtIOConsole.py.cc -> .pyo [ CXX] ARM/mem/AbstractMemory.py.cc -> .pyo [ CXX] ARM/debug/VNC.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/classic/private_l1_private_l2_cache_hierarchy.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/classic/private_l1_private_l2_cache_hierarchy.py.cc -> .pyo [ CXX] ARM/cpu/testers/rubytest/RubyTester.py.cc -> .pyo [ CXX] ARM/python/gem5/components/boards/experimental/lupv_board.py.cc -> .pyo [ CXX] ARM/python/gem5/components/boards/experimental/lupv_board.py.cc -> .o [ CXX] ARM/python/m5/util/attrdict.py.cc -> .o [ CXX] ARM/python/m5/util/attrdict.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/topologies/simple_pt2pt.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/topologies/simple_pt2pt.py.cc -> .pyo [ CXX] ARM/debug/FmtTicksOff.cc -> .o [ CXX] ARM/base/trace.cc -> .o [ CXX] ARM/debug/StatEvents.cc -> .o [ CXX] ARM/python/gem5/components/processors/linear_generator.py.cc -> .o [ CXX] ARM/python/gem5/components/processors/linear_generator.py.cc -> .pyo [ CXX] ARM/mem/ruby/system/RubySystem.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/cpu_types.py.cc -> .o [ CXX] ARM/python/gem5/components/processors/cpu_types.py.cc -> .pyo [ CXX] ARM/sim/power/ThermalModel.py.cc -> .pyo [ CXX] ARM/python/gem5/prebuilt/demo/x86_demo_board.py.cc -> .pyo [ CXX] ARM/python/gem5/prebuilt/demo/x86_demo_board.py.cc -> .o [ CXX] ARM/python/gem5/components/processors/complex_generator_core.py.cc -> .pyo [ CXX] ARM/python/gem5/components/processors/complex_generator_core.py.cc -> .o [ CXX] ARM/python/gem5/components/memory/dram_interfaces/lpddr2.py.cc -> .pyo [ CXX] ARM/python/gem5/components/memory/dram_interfaces/lpddr2.py.cc -> .o [ CXX] ARM/dev/serial/Terminal.py.cc -> .pyo [ CXX] ARM/python/m5/stats/gem5stats.py.cc -> .pyo [ CXX] ARM/python/m5/stats/gem5stats.py.cc -> .o [ CXX] ARM/debug/AnnotateAll.cc -> .o [ CXX] ARM/debug/AnnotateVerbose.cc -> .o [ CXX] ARM/dev/Device.py.cc -> .pyo [ CXX] ARM/python/m5/util/pybind.py.cc -> .o [ CXX] ARM/python/m5/util/pybind.py.cc -> .pyo [ CXX] ARM/mem/ruby/protocol/Cache_Controller.py.cc -> .pyo [ CXX] ARM/cpu/simple/TimingSimpleCPU.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/mi_example/dma_controller.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/caches/mi_example/dma_controller.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py.cc -> .pyo [ CXX] ARM/cpu/trace/TraceCPU.py.cc -> .pyo [ CXX] ARM/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.py.cc -> .pyo [ CXX] ARM/python/m5/ext/pystats/statistic.py.cc -> .pyo [ CXX] ARM/python/m5/ext/pystats/statistic.py.cc -> .o [ CXX] ARM/mem/HMCController.py.cc -> .pyo [ CXX] ARM/mem/ruby/structures/RubyCache.py.cc -> .pyo [ CXX] ARM/dev/arm/css/Scmi.py.cc -> .pyo [ CXX] ARM/python/gem5/simulate/exit_event_generators.py.cc -> .pyo [ CXX] ARM/python/gem5/simulate/exit_event_generators.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/chi/nodes/memory_controller.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/chi/nodes/memory_controller.py.cc -> .pyo [ CXX] ARM/arch/generic/InstDecoder.py.cc -> .pyo [ CXX] ARM/dev/arm/UFSHostDevice.py.cc -> .pyo [ CXX] ARM/sim/Root.py.cc -> .pyo [ CXX] ARM/python/gem5/components/cachehierarchies/chi/private_l1_cache_hierarchy.py.cc -> .o [ CXX] ARM/python/gem5/components/cachehierarchies/chi/private_l1_cache_hierarchy.py.cc -> .pyo [ CXX] ARM/arch/arm/ArmISA.py.cc -> .o [ CXX] ARM/arch/arm/ArmISA.py.cc -> .pyo [ CXX] ARM/arch/arm/ArmFsWorkload.py.cc -> .o [ CXX] ARM/arch/arm/ArmFsWorkload.py.cc -> .pyo [ CXX] ARM/mem/qos/QoSTurnaround.py.cc -> .pyo [ CXX] ARM/debug/GDBWrite.cc -> .o [ CXX] ARM/cpu/testers/traffic_gen/TrafficGen.py.cc -> .pyo [ CXX] ARM/sim/probe/Probe.py.cc -> .pyo [ CXX] ARM/arch/arm/gdb-xml/gdb_xml_aarch64_target.cc -> .o [ CXX] ARM/arch/arm/gdb-xml/gdb_xml_aarch64_core.cc -> .o [ CXX] ARM/arch/arm/gdb-xml/gdb_xml_aarch64_fpu.cc -> .o [ CXX] ARM/arch/generic/htm.cc -> .o [ CXX] ARM/arch/generic/BaseInterrupts.py.cc -> .o [ CXX] ARM/arch/generic/BaseISA.py.cc -> .o [ CXX] ARM/arch/generic/BaseMMU.py.cc -> .o [ CXX] ARM/arch/generic/BaseTLB.py.cc -> .o [ CXX] ARM/arch/generic/InstDecoder.py.cc -> .o [ CXX] ARM/debug/PageTableWalker.cc -> .o [ CXX] ARM/debug/TLB.cc -> .o [ CXX] ARM/sst/OutgoingRequestBridge.py.cc -> .o [ CXX] ARM/debug/Activity.cc -> .o [ CXX] ARM/debug/Commit.cc -> .o [ CXX] ARM/debug/Context.cc -> .o [ CXX] ARM/debug/Decode.cc -> .o [ CXX] ARM/debug/DynInst.cc -> .o [ CXX] ARM/debug/ExecEnable.cc -> .o [ CXX] ARM/debug/ExecCPSeq.cc -> .o [ CXX] ARM/debug/ExecEffAddr.cc -> .o [ CXX] ARM/debug/ExecFaulting.cc -> .o [ CXX] ARM/debug/ExecFetchSeq.cc -> .o [ CXX] ARM/debug/ExecOpClass.cc -> .o [ CXX] ARM/debug/ExecRegDelta.cc -> .o [ CXX] ARM/debug/ExecResult.cc -> .o [ CXX] ARM/debug/ExecSymbol.cc -> .o [ CXX] ARM/debug/ExecThread.cc -> .o [ CXX] ARM/debug/ExecMicro.cc -> .o [ CXX] ARM/debug/ExecMacro.cc -> .o [ CXX] ARM/debug/ExecUser.cc -> .o [ CXX] ARM/debug/ExecKernel.cc -> .o [ CXX] ARM/debug/ExecAsid.cc -> .o [ CXX] ARM/debug/ExecFlags.cc -> .o [ CXX] ARM/debug/Fetch.cc -> .o [ CXX] ARM/debug/HtmCpu.cc -> .o [ CXX] ARM/debug/InvalidReg.cc -> .o [ CXX] ARM/debug/O3PipeView.cc -> .o [ CXX] ARM/debug/PCEvent.cc -> .o [ CXX] ARM/debug/Quiesce.cc -> .o [ LINK] -> ARM/gem5py_m5 [ CXX] ARM/debug/Mwait.cc -> .o [ CXX] ARM/debug/ExecAll.cc -> .o [ CXX] ARM/debug/Exec.cc -> .o [ CXX] ARM/debug/ExecNoTicks.cc -> .o [ CXX] ARM/cpu/FuncUnit.py.cc -> .o [ CXX] ARM/cpu/StaticInstFlags.py.cc -> .o [ CXX] ARM/cpu/InstPBTrace.py.cc -> .o [ CXX] ARM/cpu/CheckerCPU.py.cc -> .o [ CXX] ARM/cpu/BaseCPU.py.cc -> .o [ CXX] ARM/cpu/CPUTracers.py.cc -> .o [ CXX] ARM/cpu/TimingExpr.py.cc -> .o [ CXX] ARM/cpu/activity.cc -> .o [ CXX] ARM/cpu/DummyChecker.py.cc -> .o [ CXX] ARM/debug/Checker.cc -> .o [ CXX] ARM/cpu/kvm/KvmVM.py.cc -> .o [ CXX] ARM/cpu/kvm/BaseKvmCPU.py.cc -> .o [ CXX] ARM/cpu/kvm/device.cc -> .o [ CXX] ARM/cpu/kvm/perfevent.cc -> .o [ CXX] ARM/cpu/kvm/timer.cc -> .o [ CXX] ARM/debug/Kvm.cc -> .o [ CXX] ARM/base/statistics.cc -> .o [ CXX] ARM/arch/arm/reg_abi.cc -> .o [ CXX] ARM/base/pixel.cc -> .o [ CXX] ARM/base/socket.cc -> .o [ CXX] ARM/base/loader/memory_image.cc -> .o [ CXX] ARM/arch/arm/htm.cc -> .o [ CXX] ARM/sst/sst_responder_interface.cc -> .o [ CXX] ARM/base/loader/object_file.cc -> .o [ CXX] ARM/base/framebuffer.cc -> .o [ CXX] ARM/python/pybind11/core.cc -> .o [ CXX] ARM/cpu/reg_class.cc -> .o [ CXX] ARM/python/pybind11/object_file.cc -> .o time="2022-10-19T03:14:48-05:00" level=error msg="error waiting for container: unexpected EOF" Build step 'Execute shell' marked build as failure Archiving artifacts _______________________________________________ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org
