Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/67572?usp=email )
Change subject: arch: Add a virtual method to the BaseISA to reset its
ThreadContext.
......................................................................
arch: Add a virtual method to the BaseISA to reset its ThreadContext.
This will be used as part of a generic CPU reset mechanism.
Change-Id: I010f6bdaca0cbb6be1799ccdc345c4828515209d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67572
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Maintainer: Gabe Black <gabebl...@google.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/generic/isa.hh
1 file changed, 18 insertions(+), 0 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/generic/isa.hh b/src/arch/generic/isa.hh
index e4e7929..e9e4d95 100644
--- a/src/arch/generic/isa.hh
+++ b/src/arch/generic/isa.hh
@@ -43,6 +43,7 @@
#include <vector>
#include "arch/generic/pcstate.hh"
+#include "base/logging.hh"
#include "cpu/reg_class.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
@@ -83,6 +84,8 @@
virtual bool inUserMode() const = 0;
virtual void copyRegsFrom(ThreadContext *src) = 0;
+ virtual void resetThread() { panic("Thread reset not implemented."); }
+
const RegClasses ®Classes() const { return _regClasses; }
// Locked memory handling functions.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I010f6bdaca0cbb6be1799ccdc345c4828515209d
Gerrit-Change-Number: 67572
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Earl Ou <shunhsin...@google.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Roger Chang <rogerycch...@google.com>
Gerrit-Reviewer: Yu-hsin Wang <yuhsi...@google.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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