OK that makes sense, because I remember going through similar
conversations/situations a while back.

What probably happened was in fixing the EIO traces for the simple CPU
you probably doubled up the
instruction counts....

I thought we didnt care aboue EIO traces anymore?

Either way, we probably should be keeping a different variable/count
for the EIO compatibility because it seems
to me that correct and EIO arent synonymous...

On Tue, Mar 18, 2008 at 12:50 PM, Gabe Black <[EMAIL PROTECTED]> wrote:
>     I think this is something I fixed for the simple CPU but not for the
>  o3 (or maybe vice versa?). I don't remember the details either. One
>  thing to be careful of is to not break the EIO traces which partially
>  depend on instruction count.
>
>  Gabe
>
>
>
>  Korey Sewell wrote:
>  > Would that be the SimpleCPU double-counting? That kind of rings a bell
>  > for me too. I think they might double-count on a fault or a system
>  > call???
>  >
>  > And now that I look at it, I think you're right. For hello-world, the
>  > O3CPU executes 5623 instructions. For SimpleCPU, it executes 5641
>  > instructions. They are 17 system calls in the hello-world app AND I am
>  > assuming there is 1 fault to extend the stack (I didnt see a stat that
>  > records the # of faults per CPU. Shouldn't we have something like
>  > that?). So that makes up for the 18 instruction difference in that
>  > case.
>  >
>  > Hopefully fixing those double-counts (again?), will fix all of them.
>  >
>  > On Mon, Mar 17, 2008 at 11:00 PM, Steve Reinhardt <[EMAIL PROTECTED]> 
> wrote:
>  >
>  >> I remember there being an issue previously about double-counting
>  >>  instructions that fault, but I thought we had agreed that that
>  >>  shouldn't happen and then fixed it.  So I don't know if my memory is
>  >>  faulty and we didn't change that, or if we did but it's back, or if
>  >>  it's a different issue.  But that's what rings a bell on this for me.
>  >>
>  >>  One of the problems with the SPEC regressions in general (and the O3
>  >>  ones in particular) is that they're SLOOOW... so it takes forever to
>  >>  update the reference stats when you make a change.  In fact I'm in the
>  >>  middle of that now.
>  >>
>  >>  Steve
>  >>
>  >>
>  >>
>  >>  On Mon, Mar 17, 2008 at 7:24 PM, Korey Sewell <[EMAIL PROTECTED]> wrote:
>  >>  > I may have known the answer to this once (or maybe I'm just dreaming),
>  >>  >  but I am currently a bit mind-boggled to why O3 has a different number
>  >>  >  of sim_insts (simulated instructions) then the SimpleCPUs for the same
>  >>  >  workloads.
>  >>  >
>  >>  >  Have the regressions not been updated? Have stats got messed up along
>  >>  >  the way???
>  >>  >  The stdout and stderr outputs seem the same regardless of CPU so maybe
>  >>  >  this is just a stat thing.
>  >>  >
>  >>  >  I detected this by grep'ing for "sim_inst" in the regressions (tests)
>  >>  >  directory long and quick folders. Here are a couple of notable
>  >>  >  discrepancies:
>  >>  >  quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt:20:sim_insts
>  >>  >                                   5623                       # Number
>  >>  >  of instructions simulated
>  >>  >  quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt:8:sim_insts
>  >>  >                                      5641                       #
>  >>  >  Number of instructions simulated
>  >>  >  quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt:8:sim_insts
>  >>  >                                      5641                       #
>  >>  >  Number of instructions simulated
>  >>  >
>  >>  >  long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt:20:sim_insts
>  >>  >                           375574819                       # Number of
>  >>  >  instructions simulated
>  >>  >  long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt:8:sim_insts
>  >>  >                              398664595                       # Number
>  >>  >  of instructions simulated
>  >>  >  long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt:8:sim_insts
>  >>  >                              398664609                       # Number
>  >>  >  of instructions simulated
>  >>  >
>  >>  >  long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt:20:sim_insts
>  >>  >                            1736043781                       # Number
>  >>  >  of instructions simulated
>  >>  >  long/60.bzip2/ref/alpha/tru64/simple-atomic/m5stats.txt:8:sim_insts
>  >>  >                               1819780127                       #
>  >>  >  Number of instructions simulated
>  >>  >  long/60.bzip2/ref/alpha/tru64/simple-timing/m5stats.txt:8:sim_insts
>  >>  >                               1819780127                       #
>  >>  >  Number of instructions simulated
>  >>  >
>  >>  >
>  >>  >  Lastly, I also noticed we dont have a low % of the SPEC regressions
>  >>  >  for the O3 CPU (in comparison to the SimpleCPU)... We (or maybe just
>  >>  >  me?!) should probably get to work on updating that  since there has
>  >>  >  been loads of detail getting that to be flexible with all kind of
>  >>  >  architectures. It would be a shame to have to re-engineer and take the
>  >>  >  time to fix things
>  >>  >  that may have previously worked...
>  >>  >
>  >>  >  --
>  >>  >  ----------
>  >>  >  Korey L Sewell
>  >>  >  Graduate Student - PhD Candidate
>  >>  >  Computer Science & Engineering
>  >>  >  University of Michigan
>  >>  >  _______________________________________________
>  >>  >  m5-dev mailing list
>  >>  >  [email protected]
>  >>  >  http://m5sim.org/mailman/listinfo/m5-dev
>  >>  >
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>  >>
>  >>
>  >
>  >
>  >
>  >
>
>  _______________________________________________
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>



-- 
----------
Korey L Sewell
Graduate Student - PhD Candidate
Computer Science & Engineering
University of Michigan
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