changeset f79155751e1d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f79155751e1d
description:
TLB: Make all tlbs derive from a common base class in both python and
C++.
diffstat:
5 files changed, 19 insertions(+), 4 deletions(-)
src/arch/alpha/AlphaTLB.py | 2 +-
src/arch/mips/MipsTLB.py | 2 +-
src/arch/sparc/SparcTLB.py | 2 +-
src/arch/x86/X86TLB.py | 1 -
src/sim/BaseTLB.py | 16 ++++++++++++++++
diffs (116 lines):
diff -r 31eac202dbd1 -r f79155751e1d src/arch/alpha/AlphaTLB.py
--- a/src/arch/alpha/AlphaTLB.py Fri Oct 10 23:43:33 2008 -0700
+++ b/src/arch/alpha/AlphaTLB.py Fri Oct 10 23:47:42 2008 -0700
@@ -28,7 +28,10 @@
from m5.SimObject import SimObject
from m5.params import *
-class AlphaTLB(SimObject):
+
+from BaseTLB import BaseTLB
+
+class AlphaTLB(BaseTLB):
type = 'AlphaTLB'
abstract = True
size = Param.Int("TLB size")
diff -r 31eac202dbd1 -r f79155751e1d src/arch/mips/MipsTLB.py
--- a/src/arch/mips/MipsTLB.py Fri Oct 10 23:43:33 2008 -0700
+++ b/src/arch/mips/MipsTLB.py Fri Oct 10 23:47:42 2008 -0700
@@ -32,7 +32,9 @@
from m5.SimObject import SimObject
from m5.params import *
-class MipsTLB(SimObject):
+from BaseTLB import BaseTLB
+
+class MipsTLB(BaseTLB):
type = 'MipsTLB'
abstract = True
size = Param.Int("TLB size")
diff -r 31eac202dbd1 -r f79155751e1d src/arch/sparc/SparcTLB.py
--- a/src/arch/sparc/SparcTLB.py Fri Oct 10 23:43:33 2008 -0700
+++ b/src/arch/sparc/SparcTLB.py Fri Oct 10 23:47:42 2008 -0700
@@ -28,7 +28,10 @@
from m5.SimObject import SimObject
from m5.params import *
-class SparcTLB(SimObject):
+
+from BaseTLB import BaseTLB
+
+class SparcTLB(BaseTLB):
type = 'SparcTLB'
abstract = True
size = Param.Int("TLB size")
diff -r 31eac202dbd1 -r f79155751e1d src/arch/x86/X86TLB.py
--- a/src/arch/x86/X86TLB.py Fri Oct 10 23:43:33 2008 -0700
+++ b/src/arch/x86/X86TLB.py Fri Oct 10 23:47:42 2008 -0700
@@ -54,10 +54,10 @@
# Authors: Gabe Black
from MemObject import MemObject
-from m5.SimObject import SimObject
from m5.params import *
from m5.proxy import *
from m5 import build_env
+from BaseTLB import BaseTLB
if build_env['FULL_SYSTEM']:
class X86PagetableWalker(MemObject):
@@ -66,7 +66,7 @@
port = Port("Port for the hardware table walker")
system = Param.System(Parent.any, "system object")
-class X86TLB(SimObject):
+class X86TLB(BaseTLB):
type = 'X86TLB'
abstract = True
size = Param.Int("TLB size")
diff -r 31eac202dbd1 -r f79155751e1d src/sim/BaseTLB.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/sim/BaseTLB.py Fri Oct 10 23:47:42 2008 -0700
@@ -0,0 +1,33 @@
+# Copyright (c) 2008 The Hewlett-Packard Development Company
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.SimObject import SimObject
+
+class BaseTLB(SimObject):
+ type = 'BaseTLB'
+ abstract = True
diff -r 31eac202dbd1 -r f79155751e1d src/sim/SConscript
--- a/src/sim/SConscript Fri Oct 10 23:43:33 2008 -0700
+++ b/src/sim/SConscript Fri Oct 10 23:47:42 2008 -0700
@@ -30,6 +30,7 @@
Import('*')
+SimObject('BaseTLB.py')
SimObject('Root.py')
SimObject('System.py')
SimObject('InstTracer.py')
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