changeset 1565c13d1483 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1565c13d1483
description:
        X86: Change the CMOS from a sub-device to a real SimObject

diffstat:

7 files changed, 117 insertions(+), 94 deletions(-)
src/dev/x86/Cmos.py                      |   19 ++++++++++
src/dev/x86/SConscript                   |    1 
src/dev/x86/cmos.cc                      |   53 ++++++++++++++++++++++++++++++
src/dev/x86/cmos.hh                      |   44 ++++++++++++++++++++++++
src/dev/x86/south_bridge/cmos.cc         |   46 --------------------------
src/dev/x86/south_bridge/cmos.hh         |   47 --------------------------
src/dev/x86/south_bridge/south_bridge.cc |    1 

diffs (truncated from 538 to 300 lines):

diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/Cmos.py
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/src/dev/x86/Cmos.py       Sat Oct 11 01:13:11 2008 -0700
@@ -0,0 +1,38 @@
+# Copyright (c) 2008 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.proxy import *
+from Device import BasicPioDevice
+
+class Cmos(BasicPioDevice):
+    type = 'Cmos'
+    cxx_class='X86ISA::Cmos'
+    time = Param.Time('01/01/2009',
+        "System time to use ('Now' for actual time)")
+    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/PC.py
--- a/src/dev/x86/PC.py Fri Oct 10 23:47:42 2008 -0700
+++ b/src/dev/x86/PC.py Sat Oct 11 01:13:11 2008 -0700
@@ -29,6 +29,7 @@
 from m5.params import *
 from m5.proxy import *
 
+from Cmos import Cmos
 from Device import IsaFake
 from Pci import PciConfigAll
 from Platform import Platform
@@ -47,6 +48,7 @@
     pciconfig = PciConfigAll()
 
     south_bridge = SouthBridge()
+    cmos = Cmos(pio_addr=x86IOAddress(0x70))
 
     # "Non-existant" port used for timing purposes by the linux kernel
     i_dont_exist = IsaFake(pio_addr=x86IOAddress(0x80), pio_size=1)
@@ -63,6 +65,7 @@
 
     def attachIO(self, bus):
         self.south_bridge.pio = bus.port
+       self.cmos.pio = bus.port
         self.i_dont_exist.pio = bus.port
         self.behind_pci.pio = bus.port
         self.com_1.pio = bus.port
diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/SConscript
--- a/src/dev/x86/SConscript    Fri Oct 10 23:47:42 2008 -0700
+++ b/src/dev/x86/SConscript    Sat Oct 11 01:13:11 2008 -0700
@@ -32,5 +32,8 @@
 
 if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
     SimObject('PC.py')
+    Source('pc.cc')
 
-    Source('pc.cc')
+    SimObject('Cmos.py')
+    Source('cmos.cc')
+    TraceFlag('CMOS', 'Accesses to CMOS devices')
diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/cmos.cc
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/src/dev/x86/cmos.cc       Sat Oct 11 01:13:11 2008 -0700
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "dev/x86/cmos.hh"
+#include "mem/packet_access.hh"
+
+Tick
+X86ISA::Cmos::read(PacketPtr pkt)
+{
+    assert(pkt->getSize() == 1);
+    switch(pkt->getAddr() - pioAddr)
+    {
+      case 0x0:
+        pkt->set(address);
+        break;
+      case 0x1:
+        pkt->set(readRegister(address));
+        break;
+      default:
+        panic("Read from undefined CMOS port.\n");
+    }
+    return latency;
+}
+
+Tick
+X86ISA::Cmos::write(PacketPtr pkt)
+{
+    assert(pkt->getSize() == 1);
+    switch(pkt->getAddr() - pioAddr)
+    {
+      case 0x0:
+        address = pkt->get<uint8_t>();
+        break;
+      case 0x1:
+        writeRegister(address, pkt->get<uint8_t>());
+        break;
+      default:
+        panic("Write to undefined CMOS port.\n");
+    }
+    return latency;
+}
+
+uint8_t
+X86ISA::Cmos::readRegister(uint8_t reg)
+{
+    assert(reg < numRegs);
+    uint8_t val;
+    if (reg <= 0xD) {
+        val = rtc.readData(reg);
+        DPRINTF(CMOS,
+           "Reading CMOS RTC reg %x as %x.\n", reg, val);
+    } else {
+        val = regs[reg];
+        DPRINTF(CMOS,
+           "Reading non-volitile CMOS address %x as %x.\n", reg, val);
+    }
+    return val;
+}
+
+void
+X86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
+{
+    assert(reg < numRegs);
+    if (reg <= 0xD) {
+        DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
+               reg, val);
+        rtc.writeData(reg, val);
+    } else {
+        DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
+               reg, val);
+        regs[reg] = val;
+    }
+}
+
+X86ISA::Cmos *
+CmosParams::create()
+{
+    return new X86ISA::Cmos(this);
+}
diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/cmos.hh
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/src/dev/x86/cmos.hh       Sat Oct 11 01:13:11 2008 -0700
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2008 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __DEV_X86_CMOS_HH__
+#define __DEV_X86_CMOS_HH__
+
+#include "dev/io_device.hh"
+#include "dev/mc146818.hh"
+#include "params/Cmos.hh"
+
+namespace X86ISA
+{
+
+class Cmos : public BasicPioDevice
+{
+  protected:
+    Tick latency;
+
+    uint8_t address;
+
+    static const int numRegs = 128;
+
+    uint8_t regs[numRegs];
+
+    uint8_t readRegister(uint8_t reg);
+    void writeRegister(uint8_t reg, uint8_t val);
+
+    class X86RTC : public MC146818
+    {
+      public:
+        X86RTC(EventManager *em, const std::string &n, const struct tm time,
+                bool bcd, Tick frequency) :
+            MC146818(em, n, time, bcd, frequency)
+        {
+        }
+      protected:
+        void handleEvent()
+        {
+            return;
+        }
+    } rtc;
+
+  public:
+    typedef CmosParams Params;
+
+    Cmos(const Params *p) : BasicPioDevice(p), latency(p->pio_latency),
+        rtc(this, "rtc", p->time, true, ULL(5000000000))
+    {
+        pioSize = 2;
+        memset(regs, 0, numRegs * sizeof(uint8_t));
+        address = 0;
+    }
+
+    Tick read(PacketPtr pkt);
+
+    Tick write(PacketPtr pkt);
+};
+
+}; // namespace X86ISA
+
+#endif //__DEV_X86_CMOS_HH__
diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/south_bridge/SConscript
--- a/src/dev/x86/south_bridge/SConscript       Fri Oct 10 23:47:42 2008 -0700
+++ b/src/dev/x86/south_bridge/SConscript       Sat Oct 11 01:13:11 2008 -0700
@@ -36,7 +36,6 @@
     Source('south_bridge.cc')
 
     # Sub devices
-    Source('cmos.cc')
     Source('i8254.cc')
     Source('i8259.cc')
     Source('speaker.cc')
diff -r f79155751e1d -r 1565c13d1483 src/dev/x86/south_bridge/SouthBridge.py
--- a/src/dev/x86/south_bridge/SouthBridge.py   Fri Oct 10 23:47:42 2008 -0700
+++ b/src/dev/x86/south_bridge/SouthBridge.py   Sat Oct 11 01:13:11 2008 -0700
@@ -32,6 +32,4 @@
 
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