changeset 4f3371a1c58c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4f3371a1c58c
description:
        X86: Make Br never report itself as the last microop.

diffstat:

1 file changed, 1 deletion(-)
src/arch/x86/isa/microops/seqop.isa |    1 -

diffs (29 lines):

diff -r 443e6f925027 -r 4f3371a1c58c src/arch/x86/isa/microops/seqop.isa
--- a/src/arch/x86/isa/microops/seqop.isa       Sun Oct 12 15:33:17 2008 -0700
+++ b/src/arch/x86/isa/microops/seqop.isa       Sun Oct 12 15:43:35 2008 -0700
@@ -169,8 +169,7 @@
 }};
 
 let {{
-    class Br(X86Microop):
-        className = "MicroBranch"
+    class SeqOp(X86Microop):
         def __init__(self, target, flags=None):
             self.target = target
             if flags:
@@ -190,6 +189,15 @@
                 "cc" : self.cond}
             return allocator
 
+    class Br(SeqOp):
+        className = "MicroBranch"
+
+        def getAllocator(self, *microFlags):
+            (is_micro, is_delayed, is_first, is_last) = microFlags
+            is_last = False
+            microFlags = (is_micro, is_delayed, is_first, is_last)
+            return super(Br, self).getAllocator(*microFlags)
+
     iop = InstObjParams("br", "MicroBranchFlags", "SeqOpBase",
             {"code": "nuIP = target",
              "else_code": "nuIP = nuIP",
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev

Reply via email to