changeset 4a4f20dfbc60 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4a4f20dfbc60
description:
        X86: Add a check type for interrupt gates.

diffstat:

0 files changed

diffs (36 lines):

diff -r 57be483cea36 -r 4a4f20dfbc60 src/arch/x86/isa/microasm.isa
--- a/src/arch/x86/isa/microasm.isa     Sun Oct 12 20:29:52 2008 -0700
+++ b/src/arch/x86/isa/microasm.isa     Sun Oct 12 20:33:37 2008 -0700
@@ -85,7 +85,7 @@
         assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
 
     # Add in symbols for the various checks of segment selectors.
-    for check in ("NoCheck", "CSCheck", "CallGateCheck",
+    for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
                   "SSCheck", "IretCheck", "IntCSCheck"):
         assembler.symbols[check] = "Seg%s" % check
 
diff -r 57be483cea36 -r 4a4f20dfbc60 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa       Sun Oct 12 20:29:52 2008 -0700
+++ b/src/arch/x86/isa/microops/regop.isa       Sun Oct 12 20:33:37 2008 -0700
@@ -233,7 +233,7 @@
             uint64_t &quotient, uint64_t &remainder);
 
     enum SegmentSelectorCheck {
-      SegNoCheck, SegCSCheck, SegCallGateCheck,
+      SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
       SegSSCheck, SegIretCheck, SegIntCSCheck
     };
 }};
@@ -1041,6 +1041,11 @@
                 panic("CS checks for far calls/jumps through call gates"
                         "not implemented.\\n");
                 break;
+              case SegIntGateCheck:
+                if (desc.dpl < m5reg.cpl) {
+                    return new GeneralProtection((uint16_t)selector);
+                }
+                break;
               case SegSSCheck:
                 if (selector.si || selector.ti) {
                     if (!desc.p) {
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