changeset 7828ee363019 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=7828ee363019
description:
X86: Implement the chks check of interrupt gate target code segments.
diffstat:
1 file changed, 3 insertions(+), 2 deletions(-)
src/arch/x86/isa/microops/regop.isa | 5 +++--
diffs (20 lines):
diff -r 4a4f20dfbc60 -r 7828ee363019 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Sun Oct 12 20:33:37 2008 -0700
+++ b/src/arch/x86/isa/microops/regop.isa Sun Oct 12 20:38:22 2008 -0700
@@ -1076,8 +1076,14 @@
break;
}
case SegIntCSCheck:
- panic("CS selector checks for interrupts and exceptions"
- "not implemented.\\n");
+ if (m5reg.mode == LongMode) {
+ if (desc.l != 1 || desc.d != 0) {
+ return new GeneralProtection(selector);
+ }
+ } else {
+ panic("Interrupt CS checks not implemented "
+ "in legacy mode.\\n");
+ }
break;
default:
panic("Undefined segment check type.\\n");
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