changeset 9af6981bb086 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=9af6981bb086
description:
X86: Implement an wrdh microop which loads bases/offsets from 16 byte
descriptors.
diffstat:
1 file changed, 4 insertions(+)
src/arch/x86/isa/microops/regop.isa | 4 ++++
diffs (46 lines):
diff -r c8479d55206c -r 9af6981bb086 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Sun Oct 12 20:48:24 2008 -0700
+++ b/src/arch/x86/isa/microops/regop.isa Sun Oct 12 22:16:53 2008 -0700
@@ -235,6 +235,15 @@
enum SegmentSelectorCheck {
SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
SegSSCheck, SegIretCheck, SegIntCSCheck
+ };
+
+ enum LongModeDescriptorType {
+ LDT64 = 2,
+ AvailableTSS64 = 9,
+ BusyTSS64 = 0xb,
+ CallGate64 = 0xc,
+ IntGate64 = 0xe,
+ TrapGate64 = 0xf
};
}};
@@ -1098,7 +1107,26 @@
class Wrdh(RegOp):
code = '''
+ SegDescriptor desc = SrcReg1;
+ uint64_t target = bits(SrcReg2, 31, 0) << 32;
+ switch(desc.type) {
+ case LDT64:
+ case AvailableTSS64:
+ case BusyTSS64:
+ replaceBits(target, 23, 0, desc.baseLow);
+ replaceBits(target, 31, 24, desc.baseHigh);
+ break;
+ case CallGate64:
+ case IntGate64:
+ case TrapGate64:
+ replaceBits(target, 15, 0, bits(desc, 15, 0));
+ replaceBits(target, 31, 16, bits(desc, 63, 48));
+ break;
+ default:
+ panic("Wrdh used with wrong descriptor type!\\n");
+ }
+ DestReg = target;
'''
class Wrtsc(WrRegOp):
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