changeset 0b7855e2b731 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0b7855e2b731
description:
X86: Make sure register microops set fault rather than returning one.
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
src/arch/x86/isa/microops/regop.isa | 2 +-
diffs (52 lines):
diff -r 9af6981bb086 -r 0b7855e2b731 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Sun Oct 12 22:16:53 2008 -0700
+++ b/src/arch/x86/isa/microops/regop.isa Sun Oct 12 22:24:06 2008 -0700
@@ -1052,14 +1052,14 @@
break;
case SegIntGateCheck:
if (desc.dpl < m5reg.cpl) {
- return new GeneralProtection((uint16_t)selector);
+ fault = new GeneralProtection((uint16_t)selector);
}
break;
case SegSSCheck:
if (selector.si || selector.ti) {
if (!desc.p) {
//FIXME This needs to also push the selector.
- return new StackFault;
+ fault = new StackFault;
}
} else {
if ((m5reg.submode != SixtyFourBitMode ||
@@ -1068,7 +1068,7 @@
desc.type.codeOrData == 0 && desc.type.w) ||
(desc.dpl != m5reg.cpl) ||
(selector.rpl != m5reg.cpl)) {
- return new GeneralProtection(psrc1 & 0xFFFF);
+ fault = new GeneralProtection(psrc1 & 0xFFFF);
}
}
break;
@@ -1078,16 +1078,17 @@
(selector.rpl < m5reg.cpl) ||
!(desc.s == 1 && desc.type.codeOrData == 1) ||
(!desc.type.c && desc.dpl != selector.rpl) ||
- (desc.type.c && desc.dpl > selector.rpl))
- return new GeneralProtection(psrc1 & 0xFFFF);
- if (!desc.p)
- return new SegmentNotPresent;
+ (desc.type.c && desc.dpl > selector.rpl)) {
+ fault = new GeneralProtection(psrc1 & 0xFFFF);
+ } else if (!desc.p) {
+ fault = new SegmentNotPresent;
+ }
break;
}
case SegIntCSCheck:
if (m5reg.mode == LongMode) {
if (desc.l != 1 || desc.d != 0) {
- return new GeneralProtection(selector);
+ fault = new GeneralProtection(selector);
}
} else {
panic("Interrupt CS checks not implemented "
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