For our initial purposes the default executes the halt instruction and should suffice as long as we have an implementation of halt that quiesces the CPU, correct?
Ali On Dec 19, 2008, at 10:08, "nathan binkert" <[email protected]> wrote: > Gabe, if you have any further questions on the x86 idle loop, I'm > actually quite familiar with it because of the ASISA stuff I was > doing. Ali is correct in how the idle loop works. One thing that is > nice is that the idle function is actually a function pointer, so it > is designed to be swapped with a different function. That makes it > really easy for you to write an m5 specific function and just change > the function pointer. (I've for example changed the idle function by > loading a module.) > > Nate > > On Fri, Dec 19, 2008 at 6:36 AM, Ali Saidi <[email protected]> wrote: >> >> >> There are a couple of psuedo instructions, although I believe that >> x86 >> at least has one type built in. >> Here are the alpha patches: >> http://repo.m5sim.org/linux-patches/file/0ab58d9bd9a5/m5/quiesce.diff >> http://repo.m5sim.org/linux-patches/file/0ab58d9bd9a5/m5/quiesce_2.6.27.diff >> >> I'm pretty sure cpu_idle() eventually calls delaut_idle() which calls >> safe_halt(). I can't find a definition for it, however I would >> imagine >> it executes the halt instruction and the cpu is quiesced until an >> interrupt arrives so diff #2 in the list is already implemented in >> x86. >> >> Diff #1 still needs to be implemented. To make it boot faster you'll >> need to modify arch/x86/lib/delay.c is a simlar manner to how I >> modified the alpha version. For that version I ended up adding a >> parameter nanoseconds to the delay_loop() function since the caller >> knew the number of nanoseconds and the loop only knew the number of >> jiffies. With the number of nano seconds I simply quiesce for the >> number of ns requested and then immediately test for the number of ns >> requested. If the time hasn't arrived yet, do some math and put the >> processor back to sleep. >> >> Ali >> >> >> >> >> >> On Dec 19, 2008, at 7:38 AM, Geoffrey Blake wrote: >> >>> I'm pretty sure in the alpha linux code, that they've added the >>> quiesce() >>> pseudo-inst to just skip past any busy wait loops. They've done this >>> for the >>> cpu_idle() loop as well in Alpha. >>> >>> -----Original Message----- >>> From: [email protected] [mailto:[email protected]] On >>> Behalf >>> Of Gabe Black >>> Sent: Friday, December 19, 2008 3:50 AM >>> To: M5 Developer List >>> Subject: [m5-dev] SLOOOOOOOOOOW IDE controller >>> >>> I finally have the IDE controller sort of working (yay!), but >>> apparently there's a built in 3 millisecond busy loop delay before >>> the >>> device is recognized as ready to go. In general, did you need to do >>> anything special to make the controller start up and work in a >>> reasonable amount of real time for Alpha? >>> >>> Gabe >>> _______________________________________________ >>> m5-dev mailing list >>> [email protected] >>> http://m5sim.org/mailman/listinfo/m5-dev >>> >>> >>> >>> No virus found in this incoming message. >>> Checked by AVG - http://www.avg.com >>> Version: 8.0.176 / Virus Database: 270.9.19/1856 - Release Date: >>> 12/18/2008 >>> 8:06 PM >>> >>> _______________________________________________ >>> m5-dev mailing list >>> [email protected] >>> http://m5sim.org/mailman/listinfo/m5-dev >>> >> >> _______________________________________________ >> m5-dev mailing list >> [email protected] >> http://m5sim.org/mailman/listinfo/m5-dev >> >> > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
