changeset 76fc2c3e10d2 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=76fc2c3e10d2
description:
X86: Fix segment limit checking.
diffstat:
1 file changed, 13 insertions(+), 11 deletions(-)
src/arch/x86/isa/microops/regop.isa | 24 +++++++++++++-----------
diffs (42 lines):
diff -r 6776001c9b92 -r 76fc2c3e10d2 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Wed Feb 25 10:17:02 2009 -0800
+++ b/src/arch/x86/isa/microops/regop.isa Wed Feb 25 10:17:08 2009 -0800
@@ -1192,10 +1192,12 @@
attr.dpl = desc.dpl;
attr.defaultSize = desc.d;
if (!desc.s) {
- SegBaseDest = SegBaseDest;
- SegLimitDest = SegLimitDest;
- SegAttrDest = SegAttrDest;
- panic("System segment encountered.\\n");
+ // The expand down bit happens to be set for gates.
+ if (desc.type.e) {
+ panic("Gate descriptor encountered.\\n");
+ }
+ attr.readable = 1;
+ attr.writable = 1;
} else {
if (!desc.p)
panic("Segment not present.\\n");
@@ -1207,14 +1209,14 @@
attr.readable = 1;
attr.writable = desc.type.w;
}
- Addr base = desc.baseLow | (desc.baseHigh << 24);
- Addr limit = desc.limitLow | (desc.limitHigh << 16);
- if (desc.g)
- limit = (limit << 12) | mask(12);
- SegBaseDest = base;
- SegLimitDest = limit;
- SegAttrDest = attr;
}
+ Addr base = desc.baseLow | (desc.baseHigh << 24);
+ Addr limit = desc.limitLow | (desc.limitHigh << 16);
+ if (desc.g)
+ limit = (limit << 12) | mask(12);
+ SegBaseDest = base;
+ SegLimitDest = limit;
+ SegAttrDest = attr;
} else {
SegBaseDest = SegBaseDest;
SegLimitDest = SegLimitDest;
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