changeset 5c61233cbd53 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5c61233cbd53
description:
X86: Add a trace flag for the page table walker.
diffstat:
2 files changed, 23 insertions(+)
src/arch/x86/SConscript | 2 ++
src/arch/x86/pagetable_walker.cc | 21 +++++++++++++++++++++
diffs (113 lines):
diff -r 3d7f94358641 -r 5c61233cbd53 src/arch/x86/SConscript
--- a/src/arch/x86/SConscript Wed Feb 25 10:17:19 2009 -0800
+++ b/src/arch/x86/SConscript Wed Feb 25 10:17:27 2009 -0800
@@ -111,6 +111,8 @@
if env['FULL_SYSTEM']:
TraceFlag('LocalApic', "Local APIC debugging")
+ TraceFlag('PageTableWalker', \
+ "Page table walker state machine debugging")
SimObject('X86LocalApic.py')
SimObject('X86System.py')
diff -r 3d7f94358641 -r 5c61233cbd53 src/arch/x86/pagetable_walker.cc
--- a/src/arch/x86/pagetable_walker.cc Wed Feb 25 10:17:19 2009 -0800
+++ b/src/arch/x86/pagetable_walker.cc Wed Feb 25 10:17:27 2009 -0800
@@ -101,6 +101,8 @@
bool badNX = pte.nx && (!tlb->allowNX() || !enableNX);
switch(state) {
case LongPML4:
+ DPRINTF(PageTableWalker,
+ "Got long mode PML4 entry %#016x.\n", (uint64_t)pte);
nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.longl3 * size;
doWrite = !pte.a;
pte.a = 1;
@@ -114,6 +116,8 @@
nextState = LongPDP;
break;
case LongPDP:
+ DPRINTF(PageTableWalker,
+ "Got long mode PDP entry %#016x.\n", (uint64_t)pte);
nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.longl2 * size;
doWrite = !pte.a;
pte.a = 1;
@@ -126,6 +130,8 @@
nextState = LongPD;
break;
case LongPD:
+ DPRINTF(PageTableWalker,
+ "Got long mode PD entry %#016x.\n", (uint64_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = entry.writable && pte.w;
@@ -154,6 +160,8 @@
return NoFault;
}
case LongPTE:
+ DPRINTF(PageTableWalker,
+ "Got long mode PTE entry %#016x.\n", (uint64_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = entry.writable && pte.w;
@@ -171,6 +179,8 @@
stop();
return NoFault;
case PAEPDP:
+ DPRINTF(PageTableWalker,
+ "Got legacy mode PAE PDP entry %#08x.\n", (uint32_t)pte);
nextRead = ((uint64_t)pte & (mask(40) << 12)) + vaddr.pael2 * size;
if (!pte.p) {
stop();
@@ -179,6 +189,8 @@
nextState = PAEPD;
break;
case PAEPD:
+ DPRINTF(PageTableWalker,
+ "Got legacy mode PAE PD entry %#08x.\n", (uint32_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = pte.w;
@@ -206,6 +218,8 @@
return NoFault;
}
case PAEPTE:
+ DPRINTF(PageTableWalker,
+ "Got legacy mode PAE PTE entry %#08x.\n", (uint32_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = entry.writable && pte.w;
@@ -223,6 +237,8 @@
stop();
return NoFault;
case PSEPD:
+ DPRINTF(PageTableWalker,
+ "Got legacy mode PSE PD entry %#08x.\n", (uint32_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = pte.w;
@@ -251,6 +267,8 @@
return NoFault;
}
case PD:
+ DPRINTF(PageTableWalker,
+ "Got legacy mode PD entry %#08x.\n", (uint32_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = pte.w;
@@ -265,6 +283,8 @@
nextState = PTE;
break;
case PTE:
+ DPRINTF(PageTableWalker,
+ "Got legacy mode PTE entry %#08x.\n", (uint32_t)pte);
doWrite = !pte.a;
pte.a = 1;
entry.writable = pte.w;
@@ -541,6 +561,7 @@
Fault
Walker::pageFault(bool present)
{
+ DPRINTF(PageTableWalker, "Raising page fault.\n");
HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
return new PageFault(entry.vaddr, present, write,
m5reg.cpl == 3, false, execute && enableNX);
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