changeset e342ab8f92fa in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e342ab8f92fa
description:
X86: Add a wrattr microop.
diffstat:
1 file changed, 5 insertions(+)
src/arch/x86/isa/microops/regop.isa | 5 +++++
diffs (15 lines):
diff -r 5c61233cbd53 -r e342ab8f92fa src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Wed Feb 25 10:17:27 2009 -0800
+++ b/src/arch/x86/isa/microops/regop.isa Wed Feb 25 10:17:38 2009 -0800
@@ -1009,6 +1009,11 @@
SegSelDest = psrc1;
'''
+ class WrAttr(SegOp):
+ code = '''
+ SegAttrDest = psrc1;
+ '''
+
class Rdbase(SegOp):
code = '''
DestReg = SegBaseSrc1;
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