changeset c3d88393a1f3 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c3d88393a1f3
description:
X86: Add IRQ4 to the Intel MP tables.
diffstat:
1 file changed, 18 insertions(+)
configs/common/FSConfig.py | 18 ++++++++++++++++++
diffs (28 lines):
diff -r 7d7df4ad7486 -r c3d88393a1f3 configs/common/FSConfig.py
--- a/configs/common/FSConfig.py Wed Feb 25 10:18:58 2009 -0800
+++ b/configs/common/FSConfig.py Wed Feb 25 10:19:06 2009 -0800
@@ -261,6 +261,24 @@
dest_io_apic_id = 1,
dest_io_apic_intin = 1)
self.intel_mp_table.add_entry(assign_1_to_apic)
+ assign_8259_4_to_apic = X86IntelMPIOIntAssignment(
+ interrupt_type = 'ExtInt',
+ polarity = 'ConformPolarity',
+ trigger = 'ConformTrigger',
+ source_bus_id = 0,
+ source_bus_irq = 4,
+ dest_io_apic_id = 1,
+ dest_io_apic_intin = 0)
+ self.intel_mp_table.add_entry(assign_8259_4_to_apic)
+ assign_4_to_apic = X86IntelMPIOIntAssignment(
+ interrupt_type = 'INT',
+ polarity = 'ConformPolarity',
+ trigger = 'ConformTrigger',
+ source_bus_id = 0,
+ source_bus_irq = 4,
+ dest_io_apic_id = 1,
+ dest_io_apic_intin = 4)
+ self.intel_mp_table.add_entry(assign_4_to_apic)
assign_8259_12_to_apic = X86IntelMPIOIntAssignment(
interrupt_type = 'ExtInt',
polarity = 'ConformPolarity',
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev