changeset ff9203dd7608 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ff9203dd7608
description:
X86: Fix a decoder bug and add in some missing instructions.
diffstat:
1 file changed, 16 insertions(+), 11 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa | 27 ++++++++++++++-----------
diffs (40 lines):
diff -r 833e487aa8f7 -r ff9203dd7608
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Fri Feb 27 09:23:58
2009 -0800
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Fri Feb 27 09:24:10
2009 -0800
@@ -829,20 +829,25 @@
0x4: shrd_Ev_Gv_Ib();
0x5: shrd_Ev_Gv_rCl();
//0x6: group16();
- 0x6: decode MODRM_MOD {
- 0x3: decode MODRM_REG {
- 0x5: BasicOperate::LFENCE(
+ 0x6: decode MODRM_REG {
+ 0x0: fxsave();
+ 0x1: fxrstor();
+ 0x2: ldmxcsr();
+ 0x3: stmxcsr();
+ 0x4: Inst::UD2();
+ 0x5: decode MODRM_MOD {
+ 0x3: BasicOperate::LFENCE(
{{/*Nothing*/}}, IsReadBarrier);
- 0x6: BasicOperate::MFENCE(
- {{/*Nothing*/}}, IsMemBarrier);
- 0x7: BasicOperate::SFENCE(
- {{/*Nothing*/}}, IsWriteBarrier);
default: Inst::UD2();
}
- default: decode MODRM_REG {
- 0x0: fxsave();
- 0x1: fxrstor();
- 0x7: clflush();
+ 0x6: decode MODRM_MOD {
+ 0x3: BasicOperate::MFENCE(
+ {{/*Nothing*/}}, IsMemBarrier);
+ default: Inst::UD2();
+ }
+ 0x7: decode MODRM_MOD {
+ 0x3: BasicOperate::SFENCE(
+ {{/*Nothing*/}}, IsWriteBarrier);
default: Inst::UD2();
}
}
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