changeset 33adfb8af4c0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=33adfb8af4c0
description:
        ARM: Add a memory_barrier function to the "comm page".
        This function doesn't actually provide a memory barrier (I don't think 
they're
        implemented) and instead just returns.

diffstat:

1 file changed, 8 insertions(+)
src/arch/arm/linux/process.cc |    8 ++++++++

diffs (18 lines):

diff -r 17e7ab512377 -r 33adfb8af4c0 src/arch/arm/linux/process.cc
--- a/src/arch/arm/linux/process.cc     Tue Jun 09 23:41:03 2009 -0700
+++ b/src/arch/arm/linux/process.cc     Tue Jun 09 23:41:35 2009 -0700
@@ -482,6 +482,14 @@
                                     swiNeg1, sizeof(swiNeg1));
     }
 
+    // We don't have barriers, so just return.
+    uint8_t memory_barrier[] =
+    {
+        0x0e, 0xf0, 0xa0, 0xe1  //usr_ret lr
+    };
+    tc->getMemPort()->writeBlob(commPage + 0x0fa0, memory_barrier,
+                                sizeof(memory_barrier));
+
     // This -should- be atomic, but I don't think all the support that we'd
     // need is implemented. There should also be memory barriers around it.
     uint8_t cmpxchg[] =
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev

Reply via email to