changeset f5edd0f709e4 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f5edd0f709e4
description:
ARM: Add in some new artificial fields that make decoding a little
easier.
diffstat:
3 files changed, 10 insertions(+), 1 deletion(-)
src/arch/arm/isa/bitfields.isa | 3 +++
src/arch/arm/predecoder.hh | 2 ++
src/arch/arm/types.hh | 6 +++++-
diffs (41 lines):
diff -r 1e6a43614a3e -r f5edd0f709e4 src/arch/arm/isa/bitfields.isa
--- a/src/arch/arm/isa/bitfields.isa Wed Jul 01 22:11:12 2009 -0700
+++ b/src/arch/arm/isa/bitfields.isa Wed Jul 01 22:11:27 2009 -0700
@@ -61,6 +61,9 @@
def bitfield OPCODE_5 opcode5;
def bitfield OPCODE_4 opcode4;
+def bitfield IS_MISC isMisc;
+def bitfield SEVEN_AND_FOUR sevenAndFour;
+
// Other
def bitfield COND_CODE condCode;
def bitfield S_FIELD sField;
diff -r 1e6a43614a3e -r f5edd0f709e4 src/arch/arm/predecoder.hh
--- a/src/arch/arm/predecoder.hh Wed Jul 01 22:11:12 2009 -0700
+++ b/src/arch/arm/predecoder.hh Wed Jul 01 22:11:27 2009 -0700
@@ -73,6 +73,8 @@
void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
{
emi = inst;
+ emi.sevenAndFour = bits(inst, 7) && bits(inst, 4);
+ emi.isMisc = (bits(inst, 24, 23) == 0x2 && bits(inst, 20) == 0);
}
//Use this to give data to the predecoder. This should be used
diff -r 1e6a43614a3e -r f5edd0f709e4 src/arch/arm/types.hh
--- a/src/arch/arm/types.hh Wed Jul 01 22:11:12 2009 -0700
+++ b/src/arch/arm/types.hh Wed Jul 01 22:11:27 2009 -0700
@@ -38,7 +38,11 @@
{
typedef uint32_t MachInst;
- BitUnion32(ExtMachInst)
+ BitUnion64(ExtMachInst)
+ // Made up bitfields that make life easier.
+ Bitfield<33> sevenAndFour;
+ Bitfield<32> isMisc;
+
// All the different types of opcode fields.
Bitfield<27, 25> opcode;
Bitfield<27, 25> opcode27_25;
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