Do we actually want to scale the number of threads on a CPU to match the workload assigned to it? That seems like something that should be fixed with the number of workloads conforming to it, not the other way around. Am I misunderstanding how that's supposed to work?
Gabe Korey Sewell wrote: > changeset 70172be3f986 in /z/repo/m5 > details: http://repo.m5sim.org/m5?cmd=changeset;node=70172be3f986 > description: > o3-smt: enforce numThreads parameter for SMT SE mode > > diffstat: > > 2 files changed, 8 insertions(+), 4 deletions(-) > configs/example/se.py | 1 + > src/cpu/o3/cpu_builder.cc | 11 +++++++---- > > diffs (36 lines): > > diff -r 82ee4a597908 -r 70172be3f986 configs/example/se.py > --- a/configs/example/se.py Wed Jul 22 20:28:32 2009 -0500 > +++ b/configs/example/se.py Sat Jul 25 00:50:27 2009 -0400 > @@ -124,6 +124,7 @@ > (CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) > > CPUClass.clock = '2GHz' > +CPUClass.numThreads = len(workloads) > > np = options.num_cpus > > diff -r 82ee4a597908 -r 70172be3f986 src/cpu/o3/cpu_builder.cc > --- a/src/cpu/o3/cpu_builder.cc Wed Jul 22 20:28:32 2009 -0500 > +++ b/src/cpu/o3/cpu_builder.cc Sat Jul 25 00:50:27 2009 -0400 > @@ -51,14 +51,17 @@ > // Full-system only supports a single thread for the moment. > ThreadID actual_num_threads = 1; > #else > + if (workload.size() > numThreads) { > + fatal("Workload Size (%i) > Max Supported Threads (%i) on This CPU", > + workload.size(), numThreads); > + } else if (workload.size() == 0) { > + fatal("Must specify at least one workload!"); > + } > + > // In non-full-system mode, we infer the number of threads from > // the workload if it's not explicitly specified. > ThreadID actual_num_threads = > (numThreads >= workload.size()) ? numThreads : workload.size(); > - > - if (workload.size() == 0) { > - fatal("Must specify at least one workload!"); > - } > #endif > > numThreads = actual_num_threads; > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
