changeset fa4e81c993d0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=fa4e81c993d0
description:
X86: Fix sign extension when doing an arithmetic shift right by 0.
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
src/arch/x86/isa/microops/regop.isa | 2 +-
diffs (12 lines):
diff -r 580a6fbc7585 -r fa4e81c993d0 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Wed Aug 05 02:56:49 2009 -0700
+++ b/src/arch/x86/isa/microops/regop.isa Wed Aug 05 02:57:47 2009 -0700
@@ -700,7 +700,7 @@
// Because what happens to the bits shift -in- on a right shift
// is not defined in the C/C++ standard, we have to sign extend
// them manually to be sure.
- uint64_t arithMask =
+ uint64_t arithMask = (shiftAmt == 0) ? 0 :
-bits(psrc1, dataSize * 8 - 1) << (dataSize * 8 - shiftAmt);
DestReg = merge(DestReg, (psrc1 >> shiftAmt) | arithMask,
dataSize);
'''
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