changeset eebbe9f1bf10 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=eebbe9f1bf10
description:
X86: Make shifts/rotations that write to 32 bits of a register zero
extend.
diffstat:
1 file changed, 4 insertions(+), 4 deletions(-)
src/arch/x86/isa/microops/regop.isa | 8 ++++----
diffs (39 lines):
diff -r cc8568cfce8f -r eebbe9f1bf10 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Wed Aug 05 02:58:54 2009 -0700
+++ b/src/arch/x86/isa/microops/regop.isa Wed Aug 05 02:59:25 2009 -0700
@@ -734,7 +734,7 @@
DestReg = merge(DestReg, top | bottom, dataSize);
}
else
- DestReg = DestReg;
+ DestReg = merge(DestReg, DestReg, dataSize);
'''
flag_code = '''
// If the shift amount is zero, no flags should be modified.
@@ -771,7 +771,7 @@
DestReg = merge(DestReg, top | bottom, dataSize);
}
else
- DestReg = DestReg;
+ DestReg = merge(DestReg, DestReg, dataSize);
'''
flag_code = '''
// If the shift amount is zero, no flags should be modified.
@@ -805,7 +805,7 @@
DestReg = merge(DestReg, top | bottom, dataSize);
}
else
- DestReg = DestReg;
+ DestReg = merge(DestReg, DestReg, dataSize);
'''
flag_code = '''
// If the shift amount is zero, no flags should be modified.
@@ -844,7 +844,7 @@
DestReg = merge(DestReg, top | bottom, dataSize);
}
else
- DestReg = DestReg;
+ DestReg = merge(DestReg, DestReg, dataSize);
'''
flag_code = '''
// If the shift amount is zero, no flags should be modified.
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