changeset 33faa9915d16 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=33faa9915d16
description:
X86: Implement the CMPXCHG8B/CMPXCHG16B instruction.
diffstat:
3 files changed, 98 insertions(+), 2 deletions(-)
src/arch/x86/isa/decoder/locked_opcodes.isa | 3
src/arch/x86/isa/decoder/two_byte_opcodes.isa | 3
src/arch/x86/isa/insts/general_purpose/semaphores.py | 94 ++++++++++++++++++
diffs (130 lines):
diff -r 4f70960761cd -r 33faa9915d16 src/arch/x86/isa/decoder/locked_opcodes.isa
--- a/src/arch/x86/isa/decoder/locked_opcodes.isa Sun Aug 09 01:01:18
2009 -0700
+++ b/src/arch/x86/isa/decoder/locked_opcodes.isa Sun Aug 09 01:01:41
2009 -0700
@@ -160,7 +160,8 @@
0x1: XADD_LOCKED(Mv,Gv);
//0x7: group9();
0x7: decode MODRM_REG {
- 0x1: WarnUnimpl::cmpxchg_Mq_LOCKED();
+ //Also CMPXCHG16B
+ 0x1: CMPXCHG8B_LOCKED(Mdp);
}
}
}
diff -r 4f70960761cd -r 33faa9915d16
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Sun Aug 09 01:01:18
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Sun Aug 09 01:01:41
2009 -0700
@@ -898,7 +898,8 @@
0x1: Inst::XADD(Ev,Gv);
//0x7: group9();
0x7: decode MODRM_REG {
- 0x1: cmpxchg_Mq();
+ //Also CMPXCHG16B
+ 0x1: Inst::CMPXCHG8B(Mdp);
0x6: decode LEGACY_OP {
0x1: vmclear_Mq();
default: decode LEGACY_REP {
diff -r 4f70960761cd -r 33faa9915d16
src/arch/x86/isa/insts/general_purpose/semaphores.py
--- a/src/arch/x86/isa/insts/general_purpose/semaphores.py Sun Aug 09
01:01:18 2009 -0700
+++ b/src/arch/x86/isa/insts/general_purpose/semaphores.py Sun Aug 09
01:01:41 2009 -0700
@@ -98,6 +98,100 @@
mov rax, rax, t1, flags=(nCZF,)
};
+def macroop CMPXCHG8B_M {
+ lea t1, seg, sib, disp, dataSize=asz
+ ldst t2, seg, [1, t0, t1], 0
+ ldst t3, seg, [1, t0, t1], dsz
+
+ sub t0, rax, t2, flags=(ZF,)
+ br label("doneComparing"), flags=(nCZF,)
+ sub t0, rdx, t3, flags=(ZF,)
+doneComparing:
+
+ # If they're equal, set t3:t2 to rbx:rcx to write to memory
+ mov t2, t2, rbx, flags=(CZF,)
+ mov t3, t3, rcx, flags=(CZF,)
+
+ # If they're not equal, set rdx:rax to the value from memory.
+ mov rax, rax, t2, flags=(nCZF,)
+ mov rdx, rdx, t3, flags=(nCZF,)
+
+ # Write to memory
+ st t3, seg, [1, t0, t1], dsz
+ st t2, seg, [1, t0, t1], 0
+};
+
+def macroop CMPXCHG8B_P {
+ rdip t7
+ lea t1, seg, riprel, disp, dataSize=asz
+ ldst t2, seg, [1, t0, t1], 0
+ ldst t3, seg, [1, t0, t1], dsz
+
+ sub t0, rax, t2, flags=(ZF,)
+ br label("doneComparing"), flags=(nCZF,)
+ sub t0, rdx, t3, flags=(ZF,)
+doneComparing:
+
+ # If they're equal, set t3:t2 to rbx:rcx to write to memory
+ mov t2, t2, rbx, flags=(CZF,)
+ mov t3, t3, rcx, flags=(CZF,)
+
+ # If they're not equal, set rdx:rax to the value from memory.
+ mov rax, rax, t2, flags=(nCZF,)
+ mov rdx, rdx, t3, flags=(nCZF,)
+
+ # Write to memory
+ st t3, seg, [1, t0, t1], dsz
+ st t2, seg, [1, t0, t1], 0
+};
+
+def macroop CMPXCHG8B_LOCKED_M {
+ lea t1, seg, sib, disp, dataSize=asz
+ ldstl t2, seg, [1, t0, t1], 0
+ ldstl t3, seg, [1, t0, t1], dsz
+
+ sub t0, rax, t2, flags=(ZF,)
+ br label("doneComparing"), flags=(nCZF,)
+ sub t0, rdx, t3, flags=(ZF,)
+doneComparing:
+
+ # If they're equal, set t3:t2 to rbx:rcx to write to memory
+ mov t2, t2, rbx, flags=(CZF,)
+ mov t3, t3, rcx, flags=(CZF,)
+
+ # If they're not equal, set rdx:rax to the value from memory.
+ mov rax, rax, t2, flags=(nCZF,)
+ mov rdx, rdx, t3, flags=(nCZF,)
+
+ # Write to memory
+ stul t3, seg, [1, t0, t1], dsz
+ stul t2, seg, [1, t0, t1], 0
+};
+
+def macroop CMPXCHG8B_LOCKED_P {
+ rdip t7
+ lea t1, seg, riprel, disp, dataSize=asz
+ ldstl t2, seg, [1, t0, t1], 0
+ ldstl t3, seg, [1, t0, t1], dsz
+
+ sub t0, rax, t2, flags=(ZF,)
+ br label("doneComparing"), flags=(nCZF,)
+ sub t0, rdx, t3, flags=(ZF,)
+doneComparing:
+
+ # If they're equal, set t3:t2 to rbx:rcx to write to memory
+ mov t2, t2, rbx, flags=(CZF,)
+ mov t3, t3, rcx, flags=(CZF,)
+
+ # If they're not equal, set rdx:rax to the value from memory.
+ mov rax, rax, t2, flags=(nCZF,)
+ mov rdx, rdx, t3, flags=(nCZF,)
+
+ # Write to memory
+ stul t3, seg, [1, t0, t1], dsz
+ stul t2, seg, [1, t0, t1], 0
+};
+
def macroop XADD_M_R {
ldst t1, seg, sib, disp
add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
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