changeset 297b8ef5eb35 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=297b8ef5eb35 description: X86: Update the stats on the ruby x86 regressions for the new CMOVcc implementation.
diffstat: 10 files changed, 119 insertions(+), 224 deletions(-) tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini | 2 tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats | 118 +++------ tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr | 20 - tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout | 13 - tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt | 18 - tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini | 2 tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats | 127 +++------- tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr | 20 - tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout | 11 tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt | 12 diffs (truncated from 644 to 300 lines): diff -r 33faa9915d16 -r 297b8ef5eb35 tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini Sun Aug 09 01:01:41 2009 -0700 +++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini Sun Aug 09 04:01:56 2009 -0700 @@ -81,7 +81,7 @@ [system.physmem] type=RubyMemory clock=1 -config_file=build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-atomic-ruby/ruby.config +config_file=build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic-ruby/ruby.config debug=false debug_file=ruby.debug file= diff -r 33faa9915d16 -r 297b8ef5eb35 tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats Sun Aug 09 01:01:41 2009 -0700 +++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats Sun Aug 09 04:01:56 2009 -0700 @@ -2,7 +2,7 @@ ================ Begin RubySystem Configuration Print ================ RubySystem config: - random_seed: 30545 + random_seed: 1234 randomization: 0 tech_nm: 45 freq_mhz: 3000 @@ -14,18 +14,20 @@ version: 0 buffer_size: 32 dma_sequencer: DMASequencer_0 - number_of_TBEs: 128 + number_of_TBEs: 256 + recycle_latency: 10 + request_latency: 6 transitions_per_cycle: 32 Directory_Controller config: DirectoryController_0 version: 0 buffer_size: 32 directory_latency: 6 directory_name: DirectoryMemory_0 + dma_select_low_bit: 6 + dma_select_num_bits: 0 memory_controller_name: MemoryControl_0 - memory_latency: 158 - number_of_TBEs: 128 + number_of_TBEs: 256 recycle_latency: 10 - to_mem_ctrl_latency: 1 transitions_per_cycle: 32 L1Cache_Controller config: L1CacheController_0 version: 0 @@ -33,7 +35,8 @@ cache: l1u_0 cache_response_latency: 12 issue_latency: 2 - number_of_TBEs: 128 + number_of_TBEs: 256 + recycle_latency: 10 sequencer: Sequencer_0 transitions_per_cycle: 32 Cache config: l1u_0 @@ -103,80 +106,40 @@ ================ End RubySystem Configuration Print ================ -Real time: Jul/06/2009 11:11:42 +Real time: Aug/09/2009 03:58:51 Profiler Stats -------------- -Elapsed_time_in_seconds: 0 -Elapsed_time_in_minutes: 0 -Elapsed_time_in_hours: 0 -Elapsed_time_in_days: 0 +Elapsed_time_in_seconds: 1 +Elapsed_time_in_minutes: 0.0166667 +Elapsed_time_in_hours: 0.000277778 +Elapsed_time_in_days: 1.15741e-05 -Virtual_time_in_seconds: 0.28 -Virtual_time_in_minutes: 0.00466667 -Virtual_time_in_hours: 7.77778e-05 -Virtual_time_in_days: 7.77778e-05 +Virtual_time_in_seconds: 0.34 +Virtual_time_in_minutes: 0.00566667 +Virtual_time_in_hours: 9.44444e-05 +Virtual_time_in_days: 3.93519e-06 -Ruby_current_time: 5491501 +Ruby_current_time: 5504001 Ruby_start_time: 1 -Ruby_cycles: 5491500 +Ruby_cycles: 5504000 -mbytes_resident: 144.855 -mbytes_total: 1330.54 -resident_ratio: 0.108873 +mbytes_resident: 144.359 +mbytes_total: 1352.23 +resident_ratio: 0.106763 Total_misses: 0 total_misses: 0 [ 0 ] user_misses: 0 [ 0 ] supervisor_misses: 0 [ 0 ] -instruction_executed: 1 [ 1 ] -ruby_cycles_executed: 5491501 [ 5491501 ] -cycles_per_instruction: 5.4915e+06 [ 5.4915e+06 ] -misses_per_thousand_instructions: 0 [ 0 ] +ruby_cycles_executed: 5504001 [ 5504001 ] transactions_started: 0 [ 0 ] transactions_ended: 0 [ 0 ] -instructions_per_transaction: 0 [ 0 ] cycles_per_transaction: 0 [ 0 ] misses_per_transaction: 0 [ 0 ] -L1D_cache cache stats: - L1D_cache_total_misses: 0 - L1D_cache_total_demand_misses: 0 - L1D_cache_total_prefetches: 0 - L1D_cache_total_sw_prefetches: 0 - L1D_cache_total_hw_prefetches: 0 - L1D_cache_misses_per_transaction: 0 - L1D_cache_misses_per_instruction: 0 - L1D_cache_instructions_per_misses: NaN - - L1D_cache_request_size: [binsize: log2 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -L1I_cache cache stats: - L1I_cache_total_misses: 0 - L1I_cache_total_demand_misses: 0 - L1I_cache_total_prefetches: 0 - L1I_cache_total_sw_prefetches: 0 - L1I_cache_total_hw_prefetches: 0 - L1I_cache_misses_per_transaction: 0 - L1I_cache_misses_per_instruction: 0 - L1I_cache_instructions_per_misses: NaN - - L1I_cache_request_size: [binsize: log2 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -L2_cache cache stats: - L2_cache_total_misses: 0 - L2_cache_total_demand_misses: 0 - L2_cache_total_prefetches: 0 - L2_cache_total_sw_prefetches: 0 - L2_cache_total_hw_prefetches: 0 - L2_cache_misses_per_transaction: 0 - L2_cache_misses_per_instruction: 0 - L2_cache_instructions_per_misses: NaN - - L2_cache_request_size: [binsize: log2 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - Busy Controller Counts: L1Cache-0:0 @@ -185,27 +148,16 @@ Busy Bank Count:0 -L1TBE_usage: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -L2TBE_usage: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -StopTable_usage: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] sequencer_requests_outstanding: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -store_buffer_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -unique_blocks_in_store_buffer: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- miss_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_L2Miss: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -multicast_retries: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -gets_mask_prediction_count: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -getx_mask_prediction_count: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -explicit_training_mask: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - Request vs. RubySystem State Profile -------------------------------- @@ -228,11 +180,11 @@ page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 37781 -page_faults: 0 +page_reclaims: 38267 +page_faults: 1 swaps: 0 block_inputs: 0 -block_outputs: 40 +block_outputs: 0 Network Stats ------------- @@ -266,7 +218,17 @@ links_utilized_percent_switch_3_link_2: 0 bw: 160000 base_latency: 1 - --- DMA --- +l1u_0 cache stats: + l1u_0_total_misses: 0 + l1u_0_total_demand_misses: 0 + l1u_0_total_prefetches: 0 + l1u_0_total_sw_prefetches: 0 + l1u_0_total_hw_prefetches: 0 + l1u_0_misses_per_transaction: nan + + l1u_0_request_size: [binsize: log2 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + + --- DMA 0 --- - Event Counts - ReadRequest 0 WriteRequest 0 @@ -281,7 +243,7 @@ BUSY_WR Ack 0 <-- - --- Directory --- + --- Directory 0 --- - Event Counts - GETX 0 GETS 0 @@ -344,7 +306,7 @@ ID_W DMA_WRITE 0 <-- ID_W Memory_Ack 0 <-- - --- L1Cache --- + --- L1Cache 0 --- - Event Counts - Load 0 Ifetch 0 diff -r 33faa9915d16 -r 297b8ef5eb35 tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr Sun Aug 09 01:01:41 2009 -0700 +++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr Sun Aug 09 04:01:56 2009 -0700 @@ -1,23 +1,7 @@ ["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "1", "-m", "1", "-s", "1024"] +Error: User specified set of debug components, but the RUBY_DEBUG compile-time flag is false. +Solution: Re-compile with RUBY_DEBUG set to true. print config: 1 -Creating new MessageBuffer for 0 0 -Creating new MessageBuffer for 0 1 -Creating new MessageBuffer for 0 2 -Creating new MessageBuffer for 0 3 -Creating new MessageBuffer for 0 4 -Creating new MessageBuffer for 0 5 -Creating new MessageBuffer for 1 0 -Creating new MessageBuffer for 1 1 -Creating new MessageBuffer for 1 2 -Creating new MessageBuffer for 1 3 -Creating new MessageBuffer for 1 4 -Creating new MessageBuffer for 1 5 -Creating new MessageBuffer for 2 0 -Creating new MessageBuffer for 2 1 -Creating new MessageBuffer for 2 2 -Creating new MessageBuffer for 2 3 -Creating new MessageBuffer for 2 4 -Creating new MessageBuffer for 2 5 warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 warn: instruction 'fnstcw_Mw' unimplemented diff -r 33faa9915d16 -r 297b8ef5eb35 tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout Sun Aug 09 01:01:41 2009 -0700 +++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout Sun Aug 09 04:01:56 2009 -0700 @@ -5,13 +5,12 @@ All Rights Reserved -M5 compiled Jul 6 2009 11:09:41 -M5 revision d3635cac686a 6289 default ruby_refs.diff qtip tip -M5 started Jul 6 2009 11:11:41 -M5 executing on maize -command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-atomic-ruby -re tests/run.py build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-atomic-ruby +M5 compiled Aug 9 2009 03:58:47 +M5 revision 33faa9915d16 6486 default tip +M5 started Aug 9 2009 03:58:49 +M5 executing on tater +command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic-ruby -re tests/run.py build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic-ruby Global frequency set at 1000000000000 ticks per second - Debug: Adding to filter: 'q' (Queue) info: Entering event queue @ 0. Starting simulation... Hello world! -Exiting @ tick 5491500 because target called exit() +Exiting @ tick 5504000 because target called exit() diff -r 33faa9915d16 -r 297b8ef5eb35 tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt Sun Aug 09 01:01:41 2009 -0700 +++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt Sun Aug 09 04:01:56 2009 -0700 @@ -1,17 +1,17 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 70231 # Simulator instruction rate (inst/s) -host_mem_usage 1362472 # Number of bytes of host memory used -host_seconds 0.14 # Real time elapsed on the host -host_tick_rate 40570791 # Simulator tick rate (ticks/s) +host_inst_rate 7886 # Simulator instruction rate (inst/s) +host_mem_usage 1384684 # Number of bytes of host memory used +host_seconds 1.21 # Real time elapsed on the host _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
