changeset b252af5cda46 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b252af5cda46
description:
        X86: Implement the MOVQ instruction.

diffstat:

2 files changed, 51 insertions(+), 8 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa                |   11 --
src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py |   48 +++++++++-

diffs (98 lines):

diff -r e207990ddd14 -r b252af5cda46 
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Mon Aug 17 18:17:26 
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Mon Aug 17 18:17:29 
2009 -0700
@@ -581,7 +581,7 @@
                     0x2: punpckhdq_Pq_Qq();
                     0x3: packssdw_Pq_Qq();
                     0x6: Inst::MOVD(Pq,Edp);
-                    0x7: movq_Pq_Qq();
+                    0x7: Inst::MOVQ(Pq,Qq);
                     default: Inst::UD2();
                 }
                 // repe (0xF3)
@@ -741,12 +741,12 @@
                     0x0: vmread_Ed_or_Eq_Gd_or_Gq();
                     0x1: vmwrite_Gd_or_Gq_Ed_or_Eq();
                     0x6: Inst::MOVD(Edp,Pdp);
-                    0x7: mov_Qq_Pq();
+                    0x7: Inst::MOVQ(Qq,Pq);
                     default: Inst::UD2();
                 }
                 // repe (0xF3)
                 0x4: decode OPCODE_OP_BOTTOM3 {
-                    0x6: movq_Vo_Mq_or_Vq_Vq();
+                    0x6: Inst::MOVQ(Vq,Wq);
                     0x7: movdqu_Wo_Vo();
                     default: Inst::UD2();
                 }
@@ -969,10 +969,7 @@
                     0x3: psrlq_Vo_Wo();
                     0x4: paddq_Vo_Wo();
                     0x5: pmullw_Vo_Wo();
-                    0x6: decode MODRM_MOD {
-                        0x3: movq_Vq_Vq();
-                        default: movq_Mq_Vq();
-                    }
+                    0x6: Inst::MOVQ(Wq,Vq);
                     0x7: pmovmskb_Gd_VRo();
                 }
                 // repne (0xF2)
diff -r e207990ddd14 -r b252af5cda46 
src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
--- a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py      Mon Aug 
17 18:17:26 2009 -0700
+++ b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py      Mon Aug 
17 18:17:29 2009 -0700
@@ -79,8 +79,54 @@
     rdip t7
     stfp mmx, seg, riprel, disp, dataSize=8
 };
+
+def macroop MOVQ_XMM_XMM {
+    movfp xmml, xmmlm
+    lfpimm xmmh, 0
+};
+
+def macroop MOVQ_XMM_M {
+    ldfp xmml, seg, sib, disp, dataSize=8
+    lfpimm xmmh, 0
+};
+
+def macroop MOVQ_XMM_P {
+    rdip t7
+    ldfp xmml, seg, riprel, disp, dataSize=8
+    lfpimm xmmh, 0
+};
+
+def macroop MOVQ_M_XMM {
+    stfp xmml, seg, sib, disp, dataSize=8
+};
+
+def macroop MOVQ_P_XMM {
+    rdip t7
+    stfp xmml, seg, riprel, disp, dataSize=8
+};
+
+def macroop MOVQ_MMX_MMX {
+    movfp mmx, mmxm
+};
+
+def macroop MOVQ_MMX_M {
+    ldfp mmx, seg, sib, disp, dataSize=8
+};
+
+def macroop MOVQ_MMX_P {
+    rdip t7
+    ldfp mmx, seg, riprel, disp, dataSize=8
+};
+
+def macroop MOVQ_M_MMX {
+    stfp mmx, seg, sib, disp, dataSize=8
+};
+
+def macroop MOVQ_P_MMX {
+    rdip t7
+    stfp mmx, seg, riprel, disp, dataSize=8
+};
 '''
-# MOVQ
 # MOVDQA
 # MOVDQU
 # MOVDQ2Q
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