changeset 4af40cccf527 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4af40cccf527
description:
X86: Implement PUNPCKLWD.
diffstat:
3 files changed, 35 insertions(+), 4 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa
| 4 +-
src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
| 19 +++++++++-
src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
| 16 +++++++-
diffs (82 lines):
diff -r 2f72755b4af7 -r 4af40cccf527
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Mon Aug 17 18:18:19
2009 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Mon Aug 17 18:18:40
2009 -0700
@@ -552,7 +552,7 @@
// no prefix
0x0: decode OPCODE_OP_BOTTOM3 {
0x0: Inst::PUNPCKLBW(Pq,Qd);
- 0x1: punpcklwd_Pq_Qd();
+ 0x1: Inst::PUNPCKLWD(Pq,Qd);
0x2: punpckldq_Pq_Qd();
0x3: packsswb_Pq_Qq();
0x4: pcmpgtb_Pq_Qq();
@@ -563,7 +563,7 @@
// operand size (0x66)
0x1: decode OPCODE_OP_BOTTOM3 {
0x0: Inst::PUNPCKLBW(Vo,Wq);
- 0x1: punpcklwd_Vo_Wq();
+ 0x1: Inst::PUNPCKLWD(Vo,Wq);
0x2: punpckldq_Vo_Wq();
0x3: packsswb_Vo_Wo();
0x4: pcmpgtb_Vo_Wo();
diff -r 2f72755b4af7 -r 4af40cccf527
src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
---
a/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
Mon Aug 17 18:18:19 2009 -0700
+++
b/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
Mon Aug 17 18:18:40 2009 -0700
@@ -71,11 +71,28 @@
unpack xmmh, xmml, ufp1, sel=1, size=1
unpack xmml, xmml, ufp1, sel=0, size=1
};
+
+def macroop PUNPCKLWD_XMM_XMM {
+ unpack xmmh, xmml, xmmlm, sel=1, size=2
+ unpack xmml, xmml, xmmlm, sel=0, size=2
+};
+
+def macroop PUNPCKLWD_XMM_M {
+ ldfp ufp1, seg, sib, disp, dataSize=8
+ unpack xmmh, xmml, ufp1, sel=1, size=2
+ unpack xmml, xmml, ufp1, sel=0, size=2
+};
+
+def macroop PUNPCKLWD_XMM_P {
+ rdip t7
+ ldfp ufp1, seg, riprel, disp, dataSize=8
+ unpack xmmh, xmml, ufp1, sel=1, size=2
+ unpack xmml, xmml, ufp1, sel=0, size=2
+};
'''
# PUNPCKHBW
# PUNPCKHWD
# PUNPCKHDQ
# PUNPCKHQDQ
-# PUNPCKLWD
# PUNPCKLDQ
# PUNPCKLQDQ
diff -r 2f72755b4af7 -r 4af40cccf527
src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
---
a/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
Mon Aug 17 18:18:19 2009 -0700
+++
b/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
Mon Aug 17 18:18:40 2009 -0700
@@ -68,9 +68,23 @@
ldfp ufp1, seg, riprel, disp, dataSize=8
unpack mmx, mmx, ufp1, sel=0, size=1
};
+
+def macroop PUNPCKLWD_MMX_MMX {
+ unpack mmx, mmx, mmxm, sel=0, size=2
+};
+
+def macroop PUNPCKLWD_MMX_M {
+ ldfp ufp1, seg, sib, disp, dataSize=8
+ unpack mmx, mmx, ufp1, sel=0, size=2
+};
+
+def macroop PUNPCKLWD_MMX_P {
+ rdip t7
+ ldfp ufp1, seg, riprel, disp, dataSize=8
+ unpack mmx, mmx, ufp1, sel=0, size=2
+};
'''
# PUNPCKHBW
# PUNPCKHWD
# PUNPCKHDQ
-# PUNPCKLWD
# PUNPCKLDQ
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev
